ncp1608 ON Semiconductor, ncp1608 Datasheet - Page 15

• Manufacturer Part Number: ncp1608
• Description: Critical Conduction Mode Pfc Controller Utilizing A Transconductance Error Amplifier
• Manufacturer: ON Semiconductor

V
using Equation 11:
Where Vac
V
pin by clamping V
the ZCD pin is internally clamped to V
when the ZCD winding is positive, the ZCD pin is
internally clamped to V
Figure 33) is necessary to limit the current into the ZCD
pin. The maximum ZCD pin current (I
to less than 10 mA. R
ZCD pin determine when the ZCD winding signal is
detected and the drive turn on begins. A large R
creates a long delay before detecting the ZCD event. In this
case, the controller operates in DCM and the power factor
is reduced. If the R
on when the drain voltage is high and efficiency is reduced.
A popular strategy for selecting R
value that achieves minimum drain voltage turn on. This
value is found experimentally. Figure 34 shows the realistic
waveforms for CrM operation due to R
capacitance.
ZCD(ARM)
ZCD(ARM)
This sequence achieves CrM operation. The maximum
The NCP1608 prevents excessive voltages on the ZCD
The value of R
V
in
HL
N
sets the maximum turns ratio and is calculated
= 1.55 V (maximum value).
R
B
ZCD
: N
is the maximum rms input voltage and
ZCD
ZCD
ZCD
w
N
ZCD
N
ZCD
B
ZCD
. When the ZCD winding is negative,
I
v
and the parasitic capacitance of the
ZCD(MAX)
R
value is too small, the drive turns
V
ZCD
is calculated using Equation 12:
CL(POS)
out
2 @ Vac
*
V
ZCD(ARM)
@ (N
R
. A resistor (R
sense
2 @ Vac
ZCD
B
HL
: N
ZCD(MAX)
ZCD
Figure 33. Implementation of the ZCD Block
ZCD
CL(NEG)
is to use the R
ZCD
HL
and the ZCD pin
)
. Similarly,
) is limited
ZCD
(eq. 12)
(eq. 11)
ZCD
http://onsemi.com
ZCD Clamp
value
ZCD
+
+
in
15
V
V
ZCD(ARM)
ZCD(TRIG)
+
−
+
−
V
V
ZCD(WIND),off
ZCD(WIND),on
V
V
Figure 34. Realistic CrM Waveforms Using a ZCD
V
Winding with R
ZCD(WIND)
ZCD(TRIG)
V
V
ZCD(ARM)
CL(NEG)
CL(POS)
DRIVE
I
I
L(peak)
L(NEG)
V
DRV
V
drain
V
ZCD
out
I
MOSFET Conduction
L
t
on
ZCD
Diode Conduction
T
t
diode
SW
and the ZCD Pin Capacitance
t
Dominant
R
S
off
Latch
Reset
t
z
Q
Q
Minimum Voltage Turn on
Demag
R
ZCD
Delay
0 A
0 V
0 V
0 V
0 V