ncp1910 ON Semiconductor, ncp1910 Datasheet - Page 21
ncp1910
Manufacturer Part Number
ncp1910
Description
Ncp1910 High Performance Combo Controller For Atx Power Supplies
Manufacturer
ON Semiconductor
Datasheet
1.NCP1910.pdf
(37 pages)
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Figure 43. The MOSFET on time t
intersection of reference voltage V
V
Where:
switching frequency. Hence the charging current I
specially designed as in Equation 5. The multiplier voltage
V
is re−formulated in Equation 7.
ramp
M
V
The PFC modulation and timing diagram is shown in
I
From Equation 3 and Equation 6, the input impedance Z
♦
♦
♦
♦
♦
ch
M
is therefore expressed in terms of t
, C
+ V
of the PFC modulation comparator,
input of the PFC modulation comparator.
V
V
I
C
V
. A relationship in Equation 4 is obtained.
ch
ramp
ramp
M
PREF
ramp
is the internal charging current,
is the multiplier voltage appearing on V
PREF
is the internal ramp voltage, the positive input
is the internal ramp capacitor, and
, and V
is the internal reference voltage, the negative
V
I
*
ch
ramp
+
C
ramp
t
C
1
+ V
PREF
ramp
C
M
ramp
T
V
also act as the ramp signal of
)
PREF
T
V
C
I
ch
PREF
ramp
t
Figure 43. PFC Duty Modulation and Timing Diagram
1
PREF
+ V
+ V
1
is generated by the
1
in Equation 6.
PREF
PREF
and ramp voltage
V
PREF
T * t
T
M
1
(eq. 4)
(eq. 5)
(eq. 6)
http://onsemi.com
pin,
ch
is
in
21
V
PREF
time, the multiplier voltage V
proportional to the I
PFC purpose. It is illustrated in Figure 44.
originally consists of a switching frequency ripple coming
from the inductor current I
inaccurately generated due to this ripple. This modulation is
the so−called “peak current mode”. Hence, an external
capacitor C
essential to bypass the high−frequency component of V
The modulation becomes the so−called “average current
mode” with a better accuracy for PFC.
Because V
It can be seen in the timing diagram in Figure 43 that V
Figure 44. Multiplier Voltage Timing Diagram
M
PREF
connected to the multiplier voltage V
and V
L−50
Z
in
+
in order to have a constant Z
bulk
V
V
PREF
M
are roughly constant versus
L
. The duty ratio can be
V
I
L−50
M
bulk
is designed to be
M
(eq. 7)
pin is
in
for
M
M
.