lt3681 Linear Technology Corporation, lt3681 Datasheet - Page 15

• Manufacturer Part Number: lt3681
• Description: 36v, 2a, 2.8mhz Step-down Switching Regulator With Integrated Power Schottky Diode
• Manufacturer: Linear Technology Corporation

APPLICATIONS INFORMATION
Soft-Start
The RUN/SS pin can be used to soft-start the LT3681,
reducing the maximum input current during start-up.
The RUN/SS pin is driven through an external RC fi lter to
create a voltage ramp at this pin. Figure 7 shows the start-
up and shut-down waveforms with the soft-start circuit.
By choosing a large RC time constant, the peak start-up
current can be reduced to the current that is required to
regulate the output, with no overshoot. Choose the value
of the resistor so that it can supply 20µA when the RUN/SS
pin reaches 2.3V.
0.22µF
RUN
Figure 7. To Soft-Start the LT3681, Add a Resistor
and Capacitor to the RUN/SS Pin
15k
Figure 6. The Minimum Input Voltage Depends on
Output Voltage, Load Current and Boost Circuit
RUN/SS
GND
6.0
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
8.0
7.5
7.0
6.5
6.0
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
0.001
0.001
TO START (RUN/SS = V
TO START (RUN/SS CONTROL)
TO RUN
TO START (RUN/SS = V
TO START (RUN/SS CONTROL)
TO RUN
0.01
0.01
LOAD CURRENT (A)
LOAD CURRENT (A)
0.1
0.1
2ms/DIV
IN
IN
)
V
T
L = 4.7
f = 800 kHz
)
V
T
L = 4.7
f = 800 kHz
A
OUT
1
1
OUT
A
= 25 C
= 25 C
= 3.3V
= 5.0V
m
m
3681 F06
10
10
3681 F07
I
1A/DIV
V
2V/DIV
V
2V/DIV
L
RUN/SS
OUT
Synchronization
The internal oscillator of the LT3681 can be synchronized
to an external 275kHz to 475kHz clock by using a 5pF
to 20pF capacitor to connect the clock signal to the RT
pin. The resistor tying the RT pin to ground should be
chosen such that the LT3681 oscillates 20% lower than
the intended synchronization frequency (see Setting the
Switching Frequency section).
The LT3681 should not be synchronized until its output
is near regulation as indicated by the PG fl ag. This can be
done with the system microcontroller/microprocessor or
with a discrete circuit by using the PG output. If a sync
signal is applied while the PG is low, the LT3681 may
exhibit erratic operation.
When applying a sync signal, positive clock transitions
reset LT3681’s internal clock and negative transitions
initiate a switch cycle. The amplitude of the sync signal
must be at least 2V. The sync signal duty cycle can range
from 5% up to a maximum value given by the following
equation:
where V
diode forward drop, V
is the switch drop, and f
quency. For example, a 24V input to 5V output at 300kHz
can be synchronized to a square wave with a maximum
duty cycle of 60%. For some applications, such as 12V
to 5V
cycle will be less than 50%. If a low duty cycle clock cannot
be obtained from the system, then a one-shot should be
used between the sync signal and the LT3681. The value
of the coupling capacitor which connects the clock signal
to the RT pin should be chosen based on the clock signal
amplitude. Good starting values for 3.3V and 5V clock
signals are 10pF and 5pF, respectively. These values should
be tested and adjusted for each individual application to
assure reliable operation.
DC
OUT
SYNC MAX
OUT
at 350kHz, the maximum allowable sync duty
(
is the programmed output voltage, V
)
=
⎛
⎝ ⎜
1
–
IN
V
is the typical input voltage, V
SW
IN
V
–
OUT
is the desired switching fre-
V
SW
+
V
+
D
V
D
⎞
⎠ ⎟
–
f
LT3681
SW
• 0 0 0ns
6
15
D
is the
3681f
SW
IN