lm26484sqx National Semiconductor Corporation, lm26484sqx Datasheet - Page 6

• Manufacturer Part Number: lm26484sqx
• Description: Power Management Unit
• Manufacturer: National Semiconductor Corporation

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V
V
ΔV
f
I
R
R
T
C
C
OSC
PEAK
ON
IN
FB
DSON
DSON
IN
O
Buck Converters SW1, SW2
Unless otherwise noted, AVDD=AVIN=VIN1=VIN2 = 3.3V, C
Buck2 is configured to 1.0V. Typical values and limits appearing in normal type apply for T
type apply over the entire junction temperature range for operation, −40°C to +125°C. (Notes 2, 7)
I/O Electrical Characteristics
Unless otherwise noted: AVDD=AVIN=VIN1=VIN2 = 3.3V. Typical values and limits appearing in normal type apply for T
Limits appearing in boldface type apply over the entire junction temperature range for operation, T
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Operating Ratings are conditions under which operation
of the device is guaranteed. Operating Ratings do not imply guaranteed performance limits. For guaranteed performance limits and associated test conditions,
see the Electrical Characteristics tables.
Note 2: All voltages are with respect to the potential at the GND pin.
Note 3: Internal thermal shutdown circuitry protects the device from permanent damage. Thermal shutdown engages at T
= 130°C (typ.)
Note 4: The Human body model is a 100 pF capacitor discharged through a 1.5 kΩ resistor into each pin. The machine model is a 200 pF capacitor discharged
directly into each pin. (MILSTD - 883 3015.7)
Note 5: In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may have to be
derated. Maximum ambient temperature (T
the application (P
MAX
Refer to dissipation rating table for P
Note 6: Junction-to-ambient thermal resistance is highly application and board-layout dependent. In applications where high maximum power dissipation exists,
special care must be paid to thermal dissipation issues in board design. More information is available in National Semiconductor Application Note AN1187.
Note 7: Min and Max limits are guaranteed by design, test, or statistical analysis. Typical numbers are not guaranteed, but do represent the most likely norm.
Note 8: This specification is guaranteed by design.
OUT
Symbol
− (θ
(P)
(N)
Symbol
T
JA
V
V
I
nPOR
V
OH
OL
× P
IH
IL
D-MAX
VIN Range
Feedback Voltage Accuracy
DC Line Regulation
DC Load Regulation
Oscillator Frequency
Peak Switching Current Limit
Pin-Pin Resistance PFET
Pin-Pin Resistance NFET
Turn On Time
Input Capacitor
Output Capacitor
D-MAX
).
), and the junction-to-ambient thermal resistance of the package in the application (θ
Parameter
Input High Level, ENSW1, ENSW2, ENLDO
Input Low Level, ENSW1, ENSW2, ENLDO
D-MAX
values at different ambient temperatures.
A-MAX
) is dependent on the maximum operating junction temperature, the maximum power dissipation of the device in
nPOR Delay
Parameter
nPOR
nPOR
AVDD=VIN1=VIN2
3.0 < V
I
100 mA < I
Start up from shut-down
Capacitance for stability
Capacitance for stability
O
=1000 mA
IN
IN
= 10 µF, C
6
< 3.6
O
Conditions
< I
MAX
OUT
= 22 µF, L
0.8*V
JA
Min
OUT
60
), as given by the following equation: T
A
IN
= 0.5 µH. Buck1 is configured to 1.8V.
= 25°C. Limits appearing in boldface
−1.0
−1.5
Min
3.0
1.8
10
10
J
J
0.125
= -40 to +125°C (Notes 2, 7)
= 160°C (typ.) and disengages at T
0.01
Typ
200
0.174
0.75
Typ
500
3.3
0.5
2.0
3.2
70
80
22
Max
0.25
475
0.4
2
Max
+1.0
+1.5
100
100
5.5
A-MAX
J
= 25°C.
Units
msec
Units
µsec
= T
MHz
µA
%/V
%/A
mΩ
mΩ
V
V
V
µF
µF
%
V
A
J-
J