mx8830 Clare, Inc., mx8830 Datasheet
mx8830
Related parts for mx8830
mx8830 Summary of contents
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... Applications: • Multiphase Desktop CPU Supplies • Mobile CPU Core Voltage supplies • High Current / Low Voltage DC/DC Synchronous Buck Converters Figure 1. MX8830B Functional Block Diagram Figure 2. MX8830R Functional Block Diagram and General Application Circuit MX8830 Drawing No. 0883009 MX8830B/MX8830R/MX8830X Synchronous Buck MOSFET Driver ...
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... Storage Temp Range Lead Temperature (Soldering, 10 sec) ESD Warning ESD (electrostatic discharge) sensitive device. Although the MX8830B/MX8830R/MX8830X feature proprietary ESD protection circuitry, permanent damage may be sustained if subjected to high energy electrostatic discharges. Proper ESD precautions are recommended to avoid performance degradation or loss of functionality. ...
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... N/A N/A Bonding Pad N/A N/A Bonding Pad SOIC and DFN Top View Lead Configurations MX8830 Drawing No. 0883009 MX8830B/MX8830R/MX8830X Name Description Upper Gate Driver Floating DC Power Terminal for BST Bootstrap Capacitor Connection. AGND Analog Ground PWM Three State PWM Input. PWM input to the Gate Drivers. ...
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... LSD = PGND ___ LSD = V PGND Conditions PWM PWM PWM MX8830B/MX8830R/MX8830X T = -40°C to 85° 5V, 4V < Min Typ 4.5 4.5 4.5 0 < -40°C to 85° 5V, 4V < Min Typ Max - ...
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... V ) HGD 3nF LOAD T measured from 90% to F_HGD 10 HGD 3nF LOAD_HGD LOAD_LGD C = 0pF DLY 5 MX8830B/MX8830R/MX8830X T = -40°C to 85° 5V, 4V < Min Typ Max 4.2 4.4 4.5 3.9 4.25 4 -40°C to 85° 5V, 4V < Min Typ Max ...
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... Propagation Delay t PD_GDSD2 PWM Tri-State T pd_tri1 PWM Tri-State T pd_tri2 *Notes: (1) See Timing Diagram in Figure 4 (2) See Timing Diagram in Figure 5 (3) See Timing Diagram in Figure 6 MX8830 Drawing No. 0883009 MX8830B/MX8830R/MX8830X T = -40°C to 85° Conditions V – 4.6V DD PGND V – 4.6V DD PGND C = 3nF ...
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... Figure 4. Non-Overlap Timing Diagram for MX8830B/8830B/8830X PWM tpd_lgd2 90% LGD tpd_lgd1 HGD-SW ___ Figure 5. LSD Propagation Delay Timing for MX8830R/X LSD 10% tpd_lgdsd1 90% LGD MX8830 Drawing No. 0883009 MX8830B/MX8830R/MX8830X tf_lgd tpd_hgd2 10% tr_hgd 90% 10% __ Figure 6. SD Propagation Delay Timing for MX8830R/X SD 10% tpd_lgdsd2 tpd_gdsd1 LGD/HGD ...
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... Package Outlines SOIC – 8 DFN – 10 MX8830 Drawing No. 0883009 MX8830B/MX8830R/MX8830X (REF.) TOP VIEW SIDE VIEW BOTTOM VIEW 8 8/9/07 www.claremicronix.com ...
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... Theory of Operation The MX8830 family are dual MOSFET drivers, designed to drive two external N-channel power MOSFETs. The low-side driver is designed to drive a non-floating N-channel power MOSFET and its output is out of phase with the PWM input. The high-side driver is designed to drive a floating N- channel power MOSFET and its output is in phase with the PWM input ...
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... Side Gate Driver so the switching current can be minimized. Shutdown For optimal system power management, the MX8830R/X drivers can be shut down to conserve power. When the SD pin is high, the MX8830R/X are enabled for normal operation. Pulling the SD MX8830 Drawing No. 0883009 MX883B/MX883R/MX883X pin low forces the HGD and LGD outputs low, and reduces the supply current by disabling the internal reference ...
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... Trace out the high current paths and use short, wide traces to make these connections. 2. Locate the VDD bypass capacitor as close as possible to the VDD and PGND pins. 3. Connect the source of the Lower MOSFET, (Q2) as close as possible the PGND. MX8830 Drawing No. 0883009 guidelines when 11 MX883B/MX883R/MX883X www ...
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... The products described in this document are not intended for use in medical implantation or other direct life support applications where malfunction may result in direct physical harm, injury or death to a person. Specification: MX8830 ©Copyright 2007, Micronix, Inc. All rights reserved. Printed in USA. 12 8/9/07 www ...