mx881 Clare, Inc., mx881 Datasheet - Page 8

• Manufacturer Part Number: mx881
• Description: Enon Flash Controller & Led Torch Driver
• Manufacturer: Clare, Inc.

MX881
Serial Interface
The MX881 has a 4 wire serial interface that is capable of operating in two modes: I
modes transfer 8 bits of information but only 5 bits are actually used to set the internal control register.
Table 3 - Interface Modes
I
The I
information on this bus, refer to
www.semiconductors.philips.com
The MX881 acts as a slave device on the I
Mode and Fast Mode formats. Its primary function is as a receiver, receiving data from a master device
that is used to set a single 5 bit register that determines the average battery current and the output
voltage. It will act as a transmitter after receiving a read command. During a read, the register data will
be output onto the I
acknowledge bit, in which it pulls the data bus low at the appropriate time. Data packets begin with the
Master issuing a START command (S) and end with the Master issuing a STOP command (P). A Restart
command is simply another START command that is issued before a STOP command. Note that with
START and STOP commands that SDATA transitions while SCLK is high. Conversely, for all other bits,
SDATA is only allowed to transition while SCLK is low.
Figure 2 - I
MX881
Drawing No. 088109
2
C Bus Interface
SDA TA
SCLK
2
C interface (follows the standard bus protocol and timing as defined by Philips). For complete
Write Sequence
2
C Sequences
Overview
Sequence
Status
Read
T
I2 C -C S
2
C bus. When receiving a non-broadcast message, the MX881 will respond with an
ISEL
1
0
STA RT
S
Active Interface
Standard I
Standard 3-wire SPI
Slave address is 0111111b.
0
T
0
S
I2 C -S C
The slave address is internally
fixed to 0111111 b.
Slave Address
1
0
Unshaded boxes represent bits
sourced by the master .
1
DA TA is s table during high per iod
of SCLK
Slave Address
1
2
1
C slave only serial interface
1
2
1
C bus and is compatible with both the HS (High Speed)
T
1
I2 C -D S
1
1
8
1
1
T
1
I2 C -D H
1
0
0
1
Data Byte - Register contents
0
placed on bus by MX889
1
D
7
Data Byte - Written to control
0
T
I2 C -C P
D
6
0
1
D
5
Shaded boxes represent bits
sourced by the MX889.
1
Register
D
4
STOP
1
D
3
1
D
2
0
D
1
T
0
I2 C -P C
D
0
IXYS
www.claremicronix.com
P
2
C or SPI. Both
0
P
7/30/07