dm9301 ETC-unknow, dm9301 Datasheet
dm9301
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dm9301 Summary of contents
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... FIFO are used to buffer data between the FX and TX interfaces). Furthermore, due to the excellent rise/fall time control by a built-in wave- shaping filter, the DM9301 needs no external filter to transport signals to the media on the 100Base-TX interface. Patent-Pending Circuits ...
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... Table of Contents General Description ................................................1 Block Diagram ........................................................1 Table of contents ....................................................2 Features .................................................................3 Pin Configuration: DM9301 QFP .............................4 Pin Description .......................................................5 Functional Description ..........................................10 100Base- Operation ................................10 FX PECL Receiver ............................................ Receiver Clock Recovery Module ................ NRZI to NRZ Converter ............................... Serial to Parallel Converter .......................... Code Group Alignment Monitor .................... Scrambler ...
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... Compliant with ANSI X3T12 TP-PMD 1995 standard Compliant with ANSI X3.166 FDDI-PMD Supports Half and Full Duplex operation 100Mbps, the DM9301 operates in Full Duplex mode at all times High performance 100Mbps clock generator and data recovery circuit Controlled output edge rates in the 100Base-TX ...
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... Pin Configuration: DM9301F QFP 1 TPRXI+ TPRXI TPTXO- 14 TPTXO ...
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... These outputs drive NRZI encoded data for PECL FX interface. I 100BASE-FX PECL Signal detect: These pins are differential signals that indicate to the DM9301 that the Optical Module interface is detecting valid optical energy. I Crystal or Oscillator Input: This pin should connect to one side of a 25MHz, 50ppm crystal if OSC/XTL#=0 ...
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... VCC is stable. Send Halt on no Link Condition: I Causes the DM9301 to Send out a Halt symbol to the TX interface link active or send out a Halt symbol to the FX interface link active. Propagates a no-link condition to the Link Partner if 1, Idle symbol if 0 ...
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... OD Indicates an error was detected by the TX Code Group Alignment Monitor function on the TX receiver. Active low (Open Drain Output) The DM9301 incorporates a "monostable" function on the TXERRLED output. This ensures that even minimum size errors generate adequate LED ON to insure visibility. FX Interface Analog Loop Back: ...
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... TPO0 92, 91, 89, TPI3, TPI2, TPI1, 88 TPI0, 8 100Mbps Ethernet Fiber/Twisted Pair Single Chip Media Converter Mux. Control 1 and 0: I Used for testing the DM9301 Data Paths. Set to zero for normal operation. Initiated at a H/W reset. Active high. MUXCTL1 MUXCTL0 Test Port Output: Reflects the DM9301 internal status ...
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... TPEN 87 TPMUX 41 BPSCRAM Power and Ground Pins : The power (VCC) and ground (GND) pins of the DM9301 are grouped in pairs of two categories - Digital Circuitry Power/Ground Pairs and Analog Circuitry Power/Ground Pair. Group A - Digital Supply Pairs 33, 42, 50, 53, DGND 63, 68, 82, 90, 98 37, 46, 51, 66, ...
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... Functional Description The DM9301 Fast Ethernet single-chip TX/FX media converter, provides the functionality as specified in IEEE802.3, integrates the complete 100BASE-TX and a PECL optic module interface for 100Base-FX. The DM9301 implements the PCS, PMA, and TP-PMD sublayer functions, as defined by specification. The term “X” will be used to describe the sections used in the fiber PHY layer interface. The term “ ...
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... XOR logic function. The result is a scrambled data stream with sufficient randomization to decrease radiated emissions at critical frequencies. Final Version: DM9301-DS-F02 May 8, 2000 100Mbps Ethernet Fiber/Twisted Pair Single Chip Media Converter TX Parallel to Serial Converter The TX Parallel to Serial converter receives parallel ...
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... TX Link Status Monitor TX Code- group Alignment Monitor 25M TPRXCLK 125M TPRXCLK NRZI Serial to Parallel Descrambler to Parallel to Serial NRZ Block Diagram Figure 2 DM9301 TX TX MLT-3 to Adaptive TPRXI+/- NRZI Version: DM9301-DS-F02 May 8, 2000 Final ...
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... Therefore, the compensation or equalization must be adaptive to ensure proper conditioning of the received signal independent of the cable length. TX MLT-3 to NRZI Decoder The DM9301 decodes the MLT-3 information from the TX Digital Adaptive Equalizer into NRZI data. TX Clock Recovery Module The TX Clock Recovery Module accepts NRZI data from the MLT-3 to NRZI decoder ...
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... Exposure to absolute maximum rating conditions for extended periods may affect device reliability. DM9301 Max. Unit Conditions 7.0 V Non-operating 5.5 V 5.5 V +150 240 C 4000 V Max. Unit Conditions --- 5. 200 mA 5V Version: DM9301-DS-F02 May 8, 2000 Final ...
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... Differential Output Current PECL FX Transmitter IFD100 PECLTX+/- 100BASE-FX Mode Differential Output Current V PECL Output Voltage – High OH V PECL Output Voltage – Low OL Final Version: DM9301-DS-F02 May 8, 2000 100Mbps Ethernet Fiber/Twisted Pair Single Chip Media Converter (V = 5V) CC Min. Typ. Max. 2.0 -200 100 2 ...
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... Ethernet Fiber/Twisted Pair Single Chip Media Converter (Over full range of operating condition unless specified otherwise) Min. Typ. 3.0 -0.5 -0.5 300 1.0 -0.5 -0.5 -50 -100 DM9301 Max. Unit Conditions 5.0 ns 0 2.0 ns 0.5 ns 0.5 ns 300 ps 2.0 ns +50 ppm 25MHz Frequency +100 ppm 25MHz Frequency Preliminary Version: DM9301-DS-F02 May 8, 2000 ...
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... Parameter t PECLRX+/- to TPTXo+/- Out ( Latency) 5-Bit Symbol 100Base-TX/FX Transmit Timing Diagram TXCLK TXD [4: 100TX+/- 100FX+/- Final Version: DM9301-DS-F02 May 8, 2000 100Mbps Ethernet Fiber/Twisted Pair Single Chip Media Converter Min. Typ Typ 1 . Min ...
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... Min. Typ. 1 Max Min. Typ 1 . Max DM9301 Unit Conditions - 90% To 10%, Into 100ohm Differential pdtxi pdfxi Unit Conditions - Version: DM9301-DS-F02 May 8, 2000 Preliminary ...
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... MII Application Circuit: DM9301 QFP .125 J1 Power Jack SOT-223 3.3v REG .80 Footprints for either Optical module 0.25 in Final Version: DM9301-DS-F02 May 8, 2000 100Mbps Ethernet Fiber/Twisted Pair Single Chip Media Converter (For Reference Only) DM9301 Sample, Fiber LEDs .120 100 PIN QFP U1 .080 holes with Plating ...
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... MII Application Circuit: DM9301 QFP 20 100Mbps Ethernet Fiber/Twisted Pair Single Chip Media Converter (Continued, For Reference Only) DM9301 Preliminary Version: DM9301-DS-F02 May 8, 2000 ...
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... Note: 1. Dimension D & not include resin fins. 2. Dimension GD & GE are for PC Board surface mount pad pitch design reference only. 3. All dimensions are based on metric system. Final Version: DM9301-DS-F02 May 8, 2000 100Mbps Ethernet Fiber/Twisted Pair Single Chip Media Converter ...
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... Taipei Sales & Marketing Office: 8F, No. 3, Lane 235, Bao-chiao Rd., Hsin-tien City, Taipei, Taiwan, R.O.C. TEL: 02-29153030 FAX: 02-29157575 Email: sales@davicom.com.tw DM9301 Davicom USA Sunnyvale, California 1135 Kern Ave., Sunnyvale, CA94086, U.S.A. TEL: 1-408-7368600 FAX: 1-408-7368688 Email: sales@davicom8.com Preliminary Version: DM9301-DS-F02 May 8, 2000 ...