lm5000sdx-6 National Semiconductor Corporation, lm5000sdx-6 Datasheet - Page 12

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lm5000sdx-6

Manufacturer Part Number
lm5000sdx-6
Description
High Voltage Switch Mode Regulator
Manufacturer
National Semiconductor Corporation
Datasheet
www.national.com
where R
850kΩ. Since R
have much effect on the above equation and can be neglected
until a value is chosen to set the zero f
cancel out the pole created by the output capacitor, f
output capacitor pole will shift with different load currents as
shown by the equation, so setting the zero is not exact. De-
termine the range of f
the zero f
quency of this zero is determined by:
Now R
to make sure that the pole f
range, change each value slightly if needed to ensure both
component values are in the recommended range. After
checking the design at the end of this section, these values
can be changed a little more to optimize performance if de-
sired. This is best done in the lab on a bench, checking the
load step response with different values until the ringing and
overshoot on the output voltage at the edge of the load steps
is minimal. This should produce a stable, high performance
circuit. For improved transient response, higher values of
R
improve the overall bandwidth which makes the regulator re-
spond more quickly to transients. If more detail is required, or
the most optimal performance is desired, refer to a more in
depth discussion of compensating current mode DC/DC
switching regulators.
HIGH OUTPUT CAPACITOR ESR COMPENSATION
When using an output capacitor with a high ESR value, or just
to improve the overall phase margin of the control loop, an-
other pole may be introduced to cancel the zero created by
the ESR. This is accomplished by adding another capacitor,
C
allel with the series combination of R
should be placed at the same frequency as f
The equation for this pole follows:
To ensure this equation is valid, and that C
without negatively impacting the effects of R
must be greater than 10f
CHECKING THE DESIGN
The final step is to check the design. This is to ensure a band-
width of ½ or less of the frequency of the RHP zero. This is
done by calculating the open-loop DC gain, A
value is known, you can calculate the crossover visually by
placing a −20dB/decade slope at each pole, and a +20dB/
decade slope for each zero. The point at which the gain plot
crosses unity gain, or 0dB, is the crossover frequency. If the
crossover frequency is at less than ½ the RHP zero, the phase
margin should be high enough for stability. The phase margin
can also be improved some by adding C
lier in the section. The equation for A
additional equations required for the calculation:
C
C2
(within the range of values) should be chosen. This will
, directly from the compensation pin V
C
can be chosen with the selected value for C
O
ZC
is the output impedance of the error amplifier,
to a point approximately in the middle. The fre-
C
is generally much less than R
P1
over the expected loads and then set
PC
.
PC
is still in the 10Hz to 100Hz
DC
C
C2
ZC
is given below with
C
and C
. f
as discussed ear-
to ground, in par-
Z1
ZC
C2
, the ESR zero.
C
DC
O
can be used
is created to
and C
C
, it does not
. The pole
. After this
C
. Check
P1
C
, f
. The
PC2
12
where R
input voltage, and R
"R
section.
SWITCH VOLTAGE LIMITS
In a flyback regulator, the maximum steady-state voltage ap-
pearing at the switch, when it is off, is set by the transformer
turns ratio, N, the output voltage, V
put voltage, V
where V
and is typically 0.5V for Schottky diodes and 0.8V for ultra-
fast recovery diodes. In certain circuits, there exists a voltage
spike, V
Usually, this voltage spike is caused by the transformer leak-
age inductance and/or the output rectifier recovery time. To
“clamp” the voltage at the switch from exceeding its maximum
value, a transient suppressor in series with a diode is inserted
across the transformer primary.
If poor circuit layout techniques are used, negative voltage
transients may appear on the Switch pin. Applying a negative
voltage (with respect to the IC's ground) to any monolithic IC
pin causes erratic and unpredictable operation of that IC. This
holds true for the LM5000 IC as well. When used in a flyback
regulator, the voltage at the Switch pin can go negative when
the switch turns on. The “ringing” voltage at the switch pin is
caused by the output diode capacitance and the transformer
leakage inductance forming a resonant circuit at the sec-
ondary(ies). The resonant circuit generates the “ringing” volt-
age, which gets reflected back through the transformer to the
switch pin. There are two common methods to avoid this
problem. One is to add an RC snubber around the output rec-
tifier(s). The values of the resistor and the capacitor must be
chosen so that the voltage at the Switch pin does not drop
below −0.4V. The resistor may range in value between 10Ω
and 1 kΩ, and the capacitor will vary from 0.001 μF to
0.1 μF. Adding a snubber will (slightly) reduce the efficiency
of the overall circuit.
The other method to reduce or eliminate the “ringing” is to
insert a Schottky diode clamp between the SW pin and the
PGND pin. The reverse voltage rating of the diode must be
greater than the switch off voltage.
DSON
vs. V
LL
L
F
is the minimum load resistance, V
, superimposed on top of the steady-state voltage .
is the forward biased voltage of the output diode,
V
IN
SW(OFF)
IN
" in the Typical Performance Characteristics
(Max):
mc
DSON
= V
IN
0.072fs (in A/s)
is the value chosen from the graph
(Max) + (V
OUT
OUT
, and the maximum in-
+V
IN
F
is the maximum
)/N

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