lm5072mhx-80 National Semiconductor Corporation, lm5072mhx-80 Datasheet - Page 14

• Manufacturer Part Number: lm5072mhx-80
• Description: Integrated 100v Power Over Ethernet Pd Interface And Pwm Controller With Aux Support
• Manufacturer: National Semiconductor Corporation

www.national.com
current to charge the input capacitors of the DC-DC converter.
To prevent excessive inrush current, the LM5072 will turn on
the hot swap MOSFET in a constant current mode. The de-
fault, pre-programmed inrush current of 150 mA can be se-
lected by simply leaving the ICL_FAUX pin open.
To adjust the capacitor charging time for a particular applica-
tion requirement, the inrush limit can be programmed to any
value between 150 and 400 mA with an external resistor
(R
Figure 7. The relationship between the R
desired inrush current limit I
equation:
The inrush current causes a voltage drop along the PoE Eth-
ernet cable (20Ω maximum) that reduces the input voltage
sensed by the LM5072. To avoid erratic turn-on (hiccups),
I
drop due to cable resistance does not exceed the V
hysteresis (6V minimum).
DC Current Limit Programming
The LM5072 provides a default DC current limit of 440 mA
nominal. This default limit can be selected by leaving the DC-
CL pin open.
The LM5072 allows the DC current limit to be programmed
within the range from 150 mA to 800 mA. Figure 8 shows the
method to program the DC current limit with an external re-
sistor, R
the desired DC current limit I
tion:
INRUSH
ICL
FIGURE 7. Input Inrush Limit Programming via R
) between the ICL_FAUX and VEE pins, as shown in
should be programmed such that the input voltage
DCCL
. The relationship between the R
DC
INRUSH
satisfies the following equa-
satisfies the following
ICL
20184622
DCCL
value and the
value and
IN-UVLO
ICL
14
FIGURE 8. Input DC Current Limit Programming via R
The maximum recommended DC current limit is 800 mA.
While thermal analysis should be a standard part of the mod-
ule development process, it may warrant additional attention
if the DC current limit is programmed to values in excess of
400 mA. This analysis should include evaluations of the dis-
sipation capability of LM5072 package, heat sinking proper-
ties of the PC Board, ambient temperature, and other heat
dissipation factors of the operating environment.
Power Good and Regulator Startup
The Power Good status indicates that the circuit is ready for
PWM controller startup to occur. It is established when the
input capacitors are fully charged through the hot swap MOS-
FET. Since the hot swap MOSFET is in series with the input
capacitors of the DC-DC converter, its drain-to-source volt-
age decreases as the charging occurs. Power Good is indi-
cated when the following two conditions are met: the
MOSFET drain-to-source voltage drops below 1.5V (with 1V
hysteresis), and the gate-to-source voltage is greater than 5V.
Circuitry internal to the LM5072 monitors both the drain and
gate voltages (see Figure 1), and issues the Power Good sta-
tus flag by pulling down the nPGOOD pin to a logic low level
relative to the ARTN pin.
The nPGOOD circuitry consists of a 2.5V comparator, a
130Ω pull down MOSFET, and a 50 µA pull up current source,
as shown in Figure 9. Once the Power Good status is estab-
lished, the nPGOOD pin voltage will be pulled down quickly
by the MOSFET, and the PWM controller will start as soon as
the nPGOOD pin voltage drops below the 2.5V threshold.
20184624
DCCL