lm5050mkx-1 National Semiconductor Corporation, lm5050mkx-1 Datasheet - Page 4
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lm5050mkx-1
Manufacturer Part Number
lm5050mkx-1
Description
High Side Or-ing Fet Controller
Manufacturer
National Semiconductor Corporation
Datasheet
1.LM5050MKX-1.pdf
(16 pages)
Available stocks
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Manufacturer
Quantity
Price
Company:
Part Number:
lm5050mkx-1/NOPB
Manufacturer:
TI
Quantity:
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www.national.com
OFF Pin
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur, including in-operability and degradation of device reliability
and/or performance. Functional operation of the device and/or non-degradation at the Absolute Maximum Ratings or other conditions beyond those indicated in
the Recommended Operating Conditions is not implied. Operating Range conditions indicate the conditions at which the device is functional and the device should
not be operated beyond such conditions. For guaranteed specifications and conditions, see the Electrical Characteristics table.
Note 2: The Human Body Model (HBM) is a 100 pF capacitor discharged through a 1.5 kΩ resistor into each pin. Applicable test standard is JESD-22-A114-C.
Note 3: For soldering specifications see the LM5050-1 Product Folder at www.national.com, general information at www.national.com/analog/packaging/, and
reflow information at www.national.com/ms/MS/MS-SOLDERING.pdf .
Note 4: The GATE pin voltage is typically 12V above the IN pin voltage when the LM5050-1 is enabled (i.e. OFF Pin is Open or Low, and V
the Absolute Maximum Rating for the IN pin voltage applies only when the LM5050-1 is disabled (i.e. OFF Pin is logic high), or for a momentary surge to that
voltage since the Absolute Maximum Rating for the GATE pin is also 100V
Note 5: Time from V
Note 6: Time from V
Note 7: Measurement of V
t
ΔV
t
I
GATE(REV)
V
Symbol
GATE(OFF)
GATE(OFF)
V
V
V
ΔV
SD(REV)
SD(REG)
OFF(IH)
OFF(IL)
I
SD(REV)
OFF
OFF
Gate Capacitance Discharge Time at
Forward to Reverse Transition
See
Gate Capacitance DischargeTime at
OFF pin Low to High Transition
See
Gate Pin Sink Current
Reverse V
V
Reverse V
Regulated Forward V
V
OFF Input High Threshold Voltage
OFF Input Low Threshold Voltage
OFF Threshold Voltage Hysteresis
OFF Pin Internal Pull-down
IN
OFF
-V
IN
IN
OUT
voltage transition from 0.0V to 5.0V until GATE pin voltage falls to V
< V
> V
Figure 3
Figure 4
GS
voltage transition from 200 mV to -500 mV until GATE pin voltage falls to V
OUT
OUT
voltage (i.e. V
SD
SD
Parameter
Threshold
Hysteresis
GATE
SD
- V
Threshold
IN
) includes 1 MΩ in parallel with C
C
(Note
C
(Note
C
(Note
C
(Note
V
V
t
V
V
V
V
V
V
V
V
V
V
V
V
V
V
≤
GATE
OUT
IN
IN
VS
IN
IN
VS
IN
OUT
OFF
OUT
OFF
OFF(IH)
OFF
OFF
GATE
GATE
GATE
GATE
10ms
- V
= 5.0V
- V
= 12.0V
- V
= V
= V
Rising
Falling
= 4.5V
= 5.0V
> V
= V
= V
5)
5)
5)
6)
= V
OUT
OUT
OUT
= 0
= 10 nF
= 47 nF
= 47 nF
IN
IN
4
- V
Conditions
IN
IN
IN
IN
-500 mV
OFF(IL)
+ 100 mV
- 500 mV
+ 3V
GATE
.
IN
+ 1V. See
IN
Figure 4
+ 1V. See
1.10
Min
1.8
-41
4.4
3.0
1
-
-
-
-
-
-
-
-
Figure 3
1.56
1.40
Typ
180
486
155
-28
2.8
25
60
10
19
22
5
8
Max
1.75
IN
350
-16
7.0
85
37
37
-
-
-
-
-
-
-
> V
OUT
). Therefore,
Unit
mV
mV
mV
mV
µA
ns
ns
A
V