lm27241 National Semiconductor Corporation, lm27241 Datasheet - Page 18
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lm27241
Manufacturer Part Number
lm27241
Description
Synchronous Buck Regulator Controller For Mobile Systems
Manufacturer
National Semiconductor Corporation
Datasheet
1.LM27241.pdf
(27 pages)
www.national.com
Application Information
FREQUENCY SET RESISTOR (TYPICAL VALUE)
LAYOUT GUIDELINES
For a deeper understanding of Buck converters and the
‘critical traces’ please see Application Note AN-1229 at http://
power.national.com .
Figure 15 is based on such an understanding of the critical
sections and also the pin functions of the LM27241. Refer to
the Typical Applications circuit and the LM27241 TSSOP
pinouts to understand the layout suggestions more thor-
oughly.
The components shown in Figure 15 are most critical and
must be placed with the following guidelines.
There are three separate Ground shapes on the top layer,
and one ground plane that is either on the bottom layer, or on
an internal layer. The ground shapes are connected to the
ground plane through vias.
Input Capacitor Ground Shape: This ground shape connects
the input capacitors and the source of the synchronous
MOSFET (Q2). This ground shape contains high ∆i/∆t cur-
rent waveforms. Therefore effort should be taken to keep
FIGURE 14. Frequency Adjust Resistor Guideline
R
FREQ
30100
25500
22100
16200
15000
12700
12400
10000
8660
7500
(Ω)
Frequency (kHz)
226
261
300
388
411
485
510
630
720
820
(Continued)
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18
sensitive ground connections away from this ground shape.
The input capacitors should be placed as close as possible
to the MOSFET, and the vias to the ground plane should be
as close to the capacitors ground pad as possible. Ensure
that this ground plane shape is not directly connected to the
Output Capacitors Ground Shape. Note that the current limit
detector circuit compares the voltage on the ILIM pin with
respect to the PGND pin. Therefore, if the power ground is
noisy it can lead to erroneous triggering of the current limit
detector. This will manifest itself as an inability to meet the
load requirement despite over sizing the current limit resis-
tor. It can also lead to failure of the output to recover after
encountering an overload condition. Connect the LM27241
PGND pin to this shape, and place two vias from the pin pad
to the ground plane.
Output Capacitor Ground Shape: The Output Capacitor
Ground Shape should be large as possible. Place the vias
that connect this shape to the ground plane as close to the
capacitor pads as possible.
SGND Ground Shape: A small ground shape should be
created so that all noise sensitive components such as the
lower feedback resistor, V
adjust resistor and SKIP/FPWM Mode select resistor can be
connected to. Two to three vias should connect this ground
shape to the ground plane. Place all the components men-
tioned as close as possible to the controller. Route the
feedback resistors from Vout to the controller as far away
from the MOSFETs and SW-node as possible.
SW-Node Shape: This shape connects the top MOSFET
source to the synchronous MOSFET drain, and then con-
nects to the output inductor. This shape should be kept small
due to the high frequency content found at this node.
Enough copper area must be left around the MOSFET for
thermal dissipation. More details on this are also provided in
AN-1229.
HDRV & LDRV connections: Try to keep the trace lengths
from the controller to the gate of the MOSFET as short as
possible. Both these traces contain fast rise and fall times,
and low inductance trace lengths should be maintained.
C
placed very close to the controller and their respective pins
for best performance.
V5
FIGURE 15. Critical Component placement (TSSOP)
& C
VDD
Capacitors: These two capacitors should be
DD
supply capacitor, frequency
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