lp5527tlx National Semiconductor Corporation, lp5527tlx Datasheet - Page 15

• Manufacturer Part Number: lp5527tlx
• Description: Tiny Led Driver For Camera Flash And 4 Leds With I2c Programmability, Connectivity Test And Audio Synchronization
• Manufacturer: National Semiconductor Corporation

I
I
The SCL pin is used for the I
used for bidirectional data transfer. Both these signals need
a pull-up resistor according to I
of the pull-up resistors are determined by the capacitance of
the bus (typ. ~ 1.8 kΩ). Signal timing specifications are
shown in table I
I
The data on SDA line must be stable during the HIGH period
of the clock signal (SCL). In other words, state of the data
line can only be changed when CLK is LOW.
I
START and STOP bits classify the beginning and the end of
the I
transitioning from HIGH to LOW while SCL line is HIGH.
STOP condition is defined as the SDA transitioning from
LOW to HIGH while SCL is HIGH. The I
generates START and STOP bits. The I
to be busy after START condition and free after STOP con-
dition. During data transmission, I
repeated START conditions. First START and repeated
START conditions are equivalent, function-wise.
2
2
2
2
C SIGNALS
C DATA VALIDITY
C START AND STOP CONDITIONS
C Compatible Interface
2
C session. START condition is defined as SDA signal
I
2
C Start and Stop Conditions
2
I
2
C Timing Parameters.
C Signals: Data Validity
2
C clock and the SDA pin is
2
C specification. The values
2
C master can generate
2
C bus is considered
2
C master always
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TRANSFERRING DATA
Every byte put on the SDA line must be eight bits long, with
the most significant bit (MSB) being transferred first. Each
byte of data has to be followed by an acknowledge bit. The
acknowledge related clock pulse is generated by the master.
The transmitter releases the SDA line (HIGH) during the
acknowledge clock pulse. The receiver must pull down the
SDA line during the 9
edge. A receiver which has been addressed must generate
an acknowledge after each byte has been received.
After the START condition, the I
address. This address is seven bits long followed by an
eighth bit which is a data direction bit (R/W). The LP5527
address is 4C hex. For the eighth bit, a “0” indicates a
WRITE and a “1” indicates a READ. The second byte selects
the register to which the data will be written. The third byte
contains data to write to the selected register.
When a READ function is to be accomplished, a WRITE
function must precede the READ function, as shown in the
I
2
C Read Cycle waveform.
I
2
C Chip Address 4C hex for LP5527
th
clock pulse, signifying an acknowl-
2
C master sends a chip
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