tle4998c Infineon Technologies Corporation, tle4998c Datasheet - Page 11

• Manufacturer Part Number: tle4998c
• Description: Tle4998c-programming Guide
• Manufacturer: Infineon Technologies Corporation

bits PE (bit 17) and PO (bit 18) need to be set in a way that the following conditions are
met (bit 0 is the LSB, bit 20 is the MSB):
• bit0 XOR bit2 XOR bit4 XOR …. XOR bit20 = 0
• bit1 XOR bit3 XOR bit5 XOR …. XOR bit19 = 0
Please refer to
Figure 8
Table 4
CMD No.
0x0
0x1
0x2
0x3
0x9
0xA
0xB
0xC
0xD
0xE
0xF
1) Left is MSB, right is LSB
2) No data frame must follow
3) Exactly one data frame must follow.
4) One or more data frames must follow until address reaches block boundary (
Application Note
MSB
1
1
O
P
Command Frame
List of available device commands
P
E
Bits
“000000”
“000001”
“000010”
“000011”
“001001”
“001010”
“001011”
“001100”
“001101”
“001110”
“001111”
Chapter 2.4
0
1)
0
for a source code example of a parity generator.
Function
Leave interface mode
Single data readout from given address without
increment
Continuous data readout from given address without
increment (power-on cycle needed to leave this state)
Continuous readout from given address with increment
(readout finished when address
block read, can not be canceled before!)
Single write data to given address without increment
Continuous write data to given address without increment
(finished by sending an arbitrary sync. command frame to
cancel)
Continuous write data to given address with increment
(block write, finished at address
an arbitrary sync. command frame to cancel)
Enable EEPROM write mode (programs
Enable EEPROM erase mode (programs
Enable EEPROM margin mode (program level check)
Enable EEPROM refresh (update EEPROM registers)
ADDR (6bit)
3)
9
TLE4998C-Programming Guide
1
2)
Interface Access Details - Part I
0
“
“
“
xxx111
xxx111
xxx111
CMD (6bit)
”
”
“
4)
”
“
Rev 1.0, 2009-02
1
).
or by sending
is reached –
0
”
”
-bits)
4)
-bits)
2) 5)
2) 5)
3)
LSB
2) 6)
1
2)