ncp3030a ON Semiconductor, ncp3030a Datasheet - Page 18
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ncp3030a
Manufacturer Part Number
ncp3030a
Description
Ncp3030a, Ncp3030b Synchronous Pwm Controller
Manufacturer
ON Semiconductor
Datasheet
1.NCP3030A.pdf
(23 pages)
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Output Capacitor Selection
output capacitor is dc voltage rating, ripple current rating,
output ripple voltage requirements, and transient response
requirements.
current at full load with proper derating. The RMS ratings
given in datasheets are generally for lower switching
frequency than used in switch mode power supplies but a
multiplier is usually given for higher frequency operation.
The RMS current for the output capacitor can be calculated
below:
combination of the ripple current selected, the output
capacitance selected, the equivalent series inductance (ESL)
and ESR.
to the ESR of the output capacitor and the capacitance
selected.
but tends to range from 1 nH to 20 nH where ceramic
capacitors have the lowest inductance and electrolytic
capacitors then to have the highest. The calculated
contributing voltage ripple from ESL is shown for the switch
on and switch off below:
response of the power supply. In fact, during load transient,
for the first few microseconds it supplies the current to the
load. The controller immediately recognizes the load
transient and sets the duty cycle to maximum, but the current
slope is limited by the inductor value.
drops due to the current variation inside the capacitor and the
ESR (neglecting the effect of the effective series inductance
(ESL)).
current during the load transient without discharging it. The
voltage drop due to output capacitor discharge is
approximated by the following equation:
The important factors to consider when selecting an
The output capacitor must be rated to handle the ripple
The maximum allowable output voltage ripple is a
The main component of the ripple voltage is usually due
The ESL of capacitors depends on the technology chosen
The output capacitor is a basic component for the fast
During a load step transient the output voltage initially
A minimum capacitor value is required to sustain the
V
ESR_C
DV
+ I
OUT−DISCHG
DV
O
V
V
@ ra @ ESR
OUT−ESR
ESLON
ESLOFF
Co
RMS
+
+
+
+ DI
ESL @ I
+ I
ESL @ I
C
Co
OUT
TRAN
)
O
I
( 1 * D )
TRAN
@
@ V
8 @ F
PP
D
PP
ra
12
@ ESR
@ F
@ F
2
IN
SW
@ L
1
SW
* V
SW
@ Co
OUT
Co
OUT
(eq. 17)
(eq. 18)
(eq. 19)
(eq. 20)
(eq. 21)
(eq. 22)
http://onsemi.com
18
In a typical converter design, the ESR of the output capacitor
bank dominates the transient response. It should be noted
that DVOUT−DISCHARGE and DVOUT−ESR are out of
phase with each other, and the larger of these two voltages
will determine the maximum deviation of the output voltage
(neglecting the effect of the ESL).
increase as the energy stored in the inductor dumps into the
output capacitor. The ESR contribution from Equation 18
still applies in addition to the output capacitor charge which
is approximated by the following equation:
Power MOSFET Selection
environment drive MOSFET selection. To adequately select
the correct MOSFETs, the design must first predict its power
dissipation. Once the dissipation is known, the thermal
impedance can be calculated to prevent the specified
maximum junction temperatures from being exceeded at the
highest ambient temperature.
conduction losses and switching losses. The control or
high−side MOSFET will display both switching and
conduction losses. The synchronous or low−side MOSFET
will exhibit only conduction losses because it switches into
nearly zero voltage. However, the body diode in the
synchronous MOSFET will suffer diode losses during the
non−overlap time of the gate drivers.
power dissipation can be approximated from:
MOSFET while it is on.
Using the ra term from Equation 6, I
loss and can be approximated from the following equations.
includes the losses associated with turning the control
MOSFET on and off and the corresponding overlap in drain
voltage and current.
Conversely during a load release, the output voltage can
Power dissipation, package size, and the thermal
Power dissipation has two primary contributors:
Starting with the high−side or control MOSFET, the
The first term is the conduction loss of the high−side
The second term from Equation 24 is the total switching
The first term for total switching losses from Equation 27
P
I
P
RMS_CONTROL
SW
COND
+ P
+ 1
2
+ I
TON
P
@ I
D_CONTROL
P
DV
RMS_CONTROL
SW_TOT
OUT
) P
OUT−CHG
+ I
@ V
TOFF
OUT
IN
+ P
+ P
@ f
@
+
SW
SW
COND
2
I
C
TRAN
D @ 1 )
) P
@ R
@ t
OUT
DS(on)_CONTROL
ON
) P
DS
2
@ V
RMS
@ L
) P
) t
SW_TOT
OUT
OUT
becomes:
OFF
ra
12
RR
2
(eq. 28)
(eq. 23)
(eq. 24)
(eq. 25)
(eq. 26)
(eq. 27)