lx1692 Microsemi Corporation, lx1692 Datasheet - Page 12

• Manufacturer Part Number: lx1692
• Description: Ccfl Backlight Controller Ic
• Manufacturer: Microsemi Corporation

Copyright © 2004
Rev. 1.2, 12/20/2006
Strike time out is programmed by selecting the capacitor
value at the C_TO pin. If the lamp has not ignited before
the end of strike time out, a fault is declared and the IC
outputs are latched off.
H
If a high voltage arc occurs due to intermittent lamp
contacts or component failure, if the over voltage feedback
divider is improperly designed, or if the open lamp voltage
regulation circuitry fails, the peak voltage on the OV_SNS
pin will rise above + 3.2 V
increments a 4 bit accumulating counter. After 16 events
are counted, an open lamp fault is declared and the IC
outputs are latched off. This fault is enabled at all times,
including during lamp striking. The 4 bit counter is reset
by signal C_BST which typically operates at 100 to 300
Hz. Also, OVSNS pin voltage is greater than 3.2V, then
ICOMP pin will be forced to discharge to 0V about 600ns.
O
The open lamp voltage regulator regulates the peak voltage
on the OV_SNS pin to ±1.97 volts, + the 0.2 volt offset,
with a maximum tolerance ±8% (±158 mV). Assuming an
additional ±5% tolerance for each of the two capacitors or
resistors in the high voltage divider, maximum open lamp
voltage tolerance at the system level is ±18%. At the high
side of tolerance, OV_SNS peak voltage is +2.42V, on the
low side of tolerance, OV_SNS input voltage will be
regulated at +1.914 V
is needed in a given application, the feedback divider can
be made with 1% resistors.
I
IGNITION
After run mode is entered, an intermittent or open lamp
problem can also be detected at the ISNS input. After
ignition, peak voltage on the ISNS input is dependent on
lamp current amplitude and voltage on the BRITE_A pin.
I_SNS signal amplitude should be designed to be greater
than ±400 mV
fault shut down does not occur. A comparator monitors
ISNS and generates a reset pulse to a watch dog timer for
any peak voltage > 0.3V. The watch dog, a 9 bit binary
counter, is reset once every cycle of I_SNS voltage. If
lamp current flowing through the ISNS resistor is too low
(e.g., voltage is less than 0.3V peak), reset pulses are not
generated and the counter is allowed to overflow and set the
fault latch. Nominal short circuit duration is 500 micro
seconds when operating at 65KHz.
NTERMITTENT OR BROKEN LAMP AFTER SUCCESSFUL
IGH
PEN
V
L
TM
AMP
OLTAGE
V
PK
OLTAGE
A
(280 mV
RC OR
11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: [phone]
PK
R
. If tighter total voltage regulation
O
EGULATION
RMS
VER
F U N C T I O N A L D E S C R I P T I O N ( C O N T I N U E D )
DC
) to insure a false open lamp
. This creates a pulse that
P
ROGRAMMED
Integrated Products Division
V
OLTAGE
®
Microsemi
S
SHORTS FROM THE HIGH VOLTAGE TERMINAL TO
GROUND
S
TERMINAL
A Short to ground from the lamp return terminal also
shorts out the lamp current sense resistor, removing current
feedback to the controller. This short is detected as a rise
in voltage across the OC_SNS resistor which is located on
the normally grounded side of the HV transformer
secondary. A comparator senses peak voltage > 2.0V
the OC_SNS pin. This comparator clocks the 4 bit watch
dog timer described above in the open lamp fault logic.
Sixteen events during a single cycle of the C_BST signal
will overflow the watchdog counter and cause an over
current shut down during either strike or run mode.
circuitry except output driver stage. Capable to source
5mA to external circuitry.
U
enough to insure stable operation.
D
dimming modes for maximum flexibility.
truth table below. Digital dimming rise and fall times can
be controlled by the ICOMP capacitor (See Dimming
Modes Table).
Full Bridge Resonant CCFL Controller
Soft shorts, including the UL safety test that places a 2K
ohm resistor across the lamp connector, are normally not a
problem because the current regulation circuitry limits
current flow to the normal lamp amplitude. However, if
the short is strong enough to lower the voltage at the
OV_SNS pin to less than 0.7 volts peak, the 7 bit shorted
lamp time out counter reset is blocked. If this counter
overflows a fault is declared and the IC outputs are latched
off. This fault detection is enabled during both strike and
run modes. This fault detection is disabled until voltage at
C_TO rises above 0.5V. The watch dog counter is not
allowed to increment during digital dimming off time
while in run mode. This fault will also be generated In the
event of a hard short directly across the lamp terminals, or
from the high voltage terminal to ground.
O
HORT CIRCUITS ACROSS THE LAMP TERMINALS AND
HORT CIRCUITS FROM GROUND TO THE LOW SIDE LAMP
NDER VOLTAGE
IMMING
N CHIP
Output voltage is 4.0 ±5%.
Keeps chip outputs active off until VDDA is high
Separate input pins are available for digital and analog
.
LDO
M
.
P
ODES
RODUCTION
REGULATOR
L
OCKOUT
D
ATA
S
HEET
Supplies all internal
See dimming
LX1692
DC
at
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