a4935 Allegro MicroSystems, Inc., a4935 Datasheet - Page 21

• Manufacturer Part Number: a4935
• Description: Automotive 3-phase Mosfet Driver
• Manufacturer: Allegro MicroSystems, Inc.

A4935
• Sensitive connections such as RDEAD and VDSTH, which
• The supply decoupling for VBB, VREG, and VDD should be
• If layout space is limited, then the Quiet ground and the
• Check the peak voltage excursion of the transients on the LSS
• Gate charge drive paths and gate discharge return paths may
have very little ground current, should be connected to the Quiet
ground (refer to figure 5), which is connected independently,
closest to the AGND pin. These sensitive components should
never be connected directly to the supply common or to a
common ground plane. They must be referenced directly to the
AGND pin.
connected to the Controller Supply ground, which is connected
independently, close to the PGND pin. The decoupling
capacitors should also be connected as close as practicable to
the relevant supply pin.
Controller Supply ground may be combined. In this case, ensure
that the ground return of the dead time resistor is close to the
AGND pin.
pin with reference to the AGND pin, using a close grounded (tip
and barrel) probe. If the voltage at LSS exceeds the absolute
maximum shown in this datasheet, add additional clamping and
capacitance between the LSS pin and the AGND pin as shown
in figure 5.
carry a large transient current pulse. Therefore, the traces from
Figure 5. Supply routing suggestions
Controller Supply Ground
Quiet Ground
VREG
VDD
VDSTH
RDEAD
AGND
A4935
VBB
PGND
VDRAIN
GHC
GHB
GHA
GLA
GLB
GLC
LSS
SC
SA
SB
Automotive 3-Phase MOSFET Driver
Optional reverse
battery protection
Optional components
to limit LSS transients
• Provide an independent connection from LSS to the common
• The inputs to the sense amplifier, CSP and CSN, should have
• A low-cost diode can be placed in the connection to VBB to
Note that the above are only recommendations. Each application
is different and may encounter different sensitivities. A driver
running a few amps will be less susceptible than one running with
150 A, and each design should be tested at the maximum current
to ensure any parasitic effects are eliminated.
GHx, GLx, Sx, and LSS should be as short as possible to reduce
the circuit trace inductance.
point of the power bridge. It is not recommended to connect
LSS directly to an xGND pin, as this may inject noise into
sensitive functions such as the timer for dead time. The LSS
connection should not be used for the CSP connection.
independent circuit traces. For best results, they should be
matched in length and route.
provide reverse battery protection. In reverse battery conditions,
it is possible to use the body diodes of the power FETs to clamp
the reverse voltage to approximately 4 V. In this case, the
additional diode in the VBB connection will prevent damage
to the A4935 and the VDRAIN input will survive the
reverse voltage.
Power Ground
R
S
115 Northeast Cutoff
1.508.853.5000; www.allegromicro.com
Allegro MicroSystems, Inc.
Worcester, Massachusetts 01615-0036 U.S.A.
+ Supply
Supply
Common
Motor
21