a29800tm-90i AMIC Technology Corporation, a29800tm-90i Datasheet - Page 2

• Manufacturer Part Number: a29800tm-90i
• Description: 1024k X 8 Bit / 512k X 16 Bit Cmos 5.0 Volt-only, Boot Sector Flash Memory
• Manufacturer: AMIC Technology Corporation

Features
The A29800 is a 5.0 volt only Flash memory organized as
1048,576 bytes of 8 bits or 524,288 words of 16 bits each.
The A29800 offers the
data are further divided into nineteen sectors for flexible
sector erase capability. The 8 bits of data appear on I/O
I/O
of data appear on I/O
SOP and 48-Pin TSOP packages. This device is designed to
be programmed in-system with the standard system 5.0 volt
VCC supply. Additional 12.0 volt VPP is not required for in-
system write or erase operations. However, the A29800 can
also be programmed in standard EPROM programmers.
The A29800 has the first toggle bit, I/O
whether an Embedded Program or Erase is in progress, or it
is in the Erase Suspend. Besides the I/O
A29800 has a second toggle bit, I/O
addressed sector is being selected for erase. The A29800
also offers the ability to program in the Erase Suspend mode.
The standard A29800 offers access times of 55, 70 and 90
ns, allowing high-speed microprocessors to operate without
wait states. To eliminate bus contention the device has
separate chip enable (
enable (
The device requires only a single 5.0 volt power supply for
both read and write functions.
(November, 2007, Version 1.3)
General Description
5.0V ± 10% for read and write operations
Access times:
- 55/70/90 (max.)
Current:
- 28mA read current (word mode)
- 20 mA typical active read current (byte mode)
- 30 mA typical program/erase current
- 1 μA typical CMOS standby
Flexible sector architecture
- 16 Kbyte/ 8 KbyteX2/ 32 Kbyte/ 64 KbyteX15 sectors
- 8 Kword/ 4 KwordX2/ 16 Kword/ 32 KwordX15 sectors
- Any combination of sectors can be erased
- Supports full chip erase
- Sector protection:
Top or bottom boot block configurations available
Embedded Erase Algorithms
- Embedded Erase algorithm will automatically erase the
- Embedded Program algorithm automatically writes and
Extended operating temperature range: -25°C ~ +85°C
7
for – I series
A hardware method of protecting sectors to prevent any
inadvertent program or erase operations within that
sector
entire chip or any combination of designated sectors and
verify the erased sectors
verifies bytes at specified addresses
while the addresses are input on A1 to A18; the 16 bits
OE
) controls.
0
~I/O
RESET
CE
15
), write enable ( WE ) and output
. The A29800 is offered in 44-pin
function. The 1024 Kbytes of
2
, to indicate whether the
6
, which indicates
6
1024K X 8 Bit / 512K X 16 Bit CMOS 5.0 Volt-only,
toggle bit, the
0
-
1
Internally generated and regulated voltages are provided for
the program and erase operations.
The A29800 is entirely software command set compatible
with
Commands are written to the command register using
standard microprocessor write timings. Register contents
serve as input to an internal state-machine that controls the
erase and programming circuitry.
Write cycles also internally latch addresses and data needed
for the programming and erase operations. Reading data out
of the device is similar to reading from other Flash or EPROM
devices.
Device programming occurs by writing the proper program
command sequence. This initiates the Embedded Program
algorithm - an internal algorithm that automatically times the
program pulse widths and verifies proper program margin.
Device erasure occurs by executing the proper erase
command sequence. This initiates the Embedded Erase
algorithm
preprograms the array (if it is not already programmed)
before executing the erase operation.
During erase, the device automatically times the erase pulse
widths and verifies proper erase margin.
The host system can detect whether a program or erase
operation is complete by reading the I/O
I/O
6
Typical 100,000 program/erase cycles per sector
20-year data retention at 125°C
- Reliable operation for the life of the system
Compatible with JEDEC-standards
- Pinout and software compatible with single-power-supply
- Superior inadvertent write protection
- Provides a software method of detecting completion of
Erase Suspend/Erase Resume
- Suspends a sector erase operation to read data from, or
Hardware reset pin (
- Hardware method to reset the device to reading array
Package options
- 44-pin SOP or 48-pin TSOP (I)
- All Pb-free (Lead-free) products are RoHS compliant
Data
Flash memory standard
data
program or erase operations
(toggle) status bits. After a program or erase cycle has
program data to, a non-erasing sector, then resumes the
erase operation
the
Polling and toggle bits
-
JEDEC
an
Boot Sector Flash Memory
internal
single-power-supply
RESET
AMIC Technology, Corp.
algorithm
A29800 Series
)
7
that
(
Data
Flash
automatically
Polling) and
standard.