a6832eep Allegro MicroSystems, Inc., a6832eep Datasheet

a6832eep

Manufacturer Part Number

a6832eep

Description

A6832 Dabic-5 32-bit Serial Input Latched Sink Drivers

Manufacturer

Allegro MicroSystems, Inc.

Datasheet

1.A6832EEP.pdf (7 pages)

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Output Voltage, V

Logic Supply Voltage, V

Input Voltage Range, V

Continuous Output Current, I

Package Power Dissipation, P

Operating Temperature Range

Caution: CMOS devices have input-static protection,

but are susceptible to damage when exposed to

extremely high static-electrical charges.

Ambient Temperature, T

Storage Temperature, T

AB SO LUTE MAX I MUM RAT INGS

A6832SEP/A6832EEP

OUT

44-pin PLCC

.........................................40 V

DABiC-5 32-Bit Serial Input Latched Sink Drivers

..............–0.3 V to V

...................................7 V

............–20°C to +85°C

..........–55°C to +150°C

OUT

, see chart, page 5

................. 125 mA

+0.3 V

A6832

FEATURES

APPLICATIONS

Use the following complete part numbers when ordering:

Intended originally to drive thermal printheads, the A6832 has been

optimized for low output-saturation voltage, high-speed operation,

and pin conﬁ gurations that are the most convenient for the tight space

requirements of high-resolution printheads. These integrated circuits

can also be used to drive multiplexed LED displays or incandescent

lamps at up to 125 mA peak current. The combination of bipolar and

MOS technologies gives the A6832 arrays an interface ﬂ exibility

beyond the reach of standard buffers and power driver circuits.

The devices each have 32 bipolar npn open-collector saturated driv-

ers, a CMOS data latch for each of the drivers, two 16-bit CMOS shift

registers, and CMOS control circuitry. The high-speed CMOS shift reg-

isters and latches allow operation with most microprocessor-based sys-

tems. Use of these drivers with TTL may require input pull-up resistors

to ensure an input logic high. MOS serial data outputs permit cascading

for interface applications requiring additional drive lines.

The A6832 is supplied in a 44-lead plastic leaded chip carrier (package

sufﬁ x EP), for surface-mount applications requiring minimum area. These

devices are lead (Pb) free, with 100% matte tin plated leadframes.

Part Number

A6832SEP-T

A6832EEP-T

3.3 V to 5 V logic supply range

To 10 MHz data input rate

Schmitt trigger inputs for improved noise immunity

Low-power CMOS logic and latches

40 V current sink outputs

Low saturation voltage

–40°C operation available

Thermal printheads

Multiplexed LED displays

Incandescent lamps

Pins

Package

PLCC

Operating Temperature

–20ºC to +85ºC

–40ºC to +85ºC

Related parts for a6832eep

a6832eep Summary of contents

Page 1

... Low saturation voltage –40°C operation available APPLICATIONS +0 Thermal printheads Multiplexed LED displays Incandescent lamps Use the following complete part numbers when ordering: Part Number Pins A6832SEP-T 44 A6832EEP-T 44 Package Operating Temperature PLCC –20ºC to +85ºC PLCC –40ºC to +85ºC ...

Page 2

DABiC-5 32-Bit Serial-Input Latched Sink Drivers Functional Block Diagram C LOC IAL DATA OUT NAB LE OUT OUT OUT 1 2 Typical Input Circuit 32 ...

Page 3

DABiC-5 32-Bit Serial-Input Latched Sink Drivers ELECTRICAL CHARACTERISTICS Characteristic Symbol Output Leakage Current I CEX Collector–Emitter V CE(SAT) Saturation Voltage V IN(1) Input Voltage V IN(0) I IN(1) Input Current I IN(0) V OUT(1) Serial Data Output Voltage V OUT(0) ...

Page 4

DABiC-5 32-Bit Serial-Input Latched Sink Drivers Timing Requirements and Speciﬁ cations (Logic Levels are V C LOC IAL DAT A DAT IAL DAT A OUT ...

Page 5

... DABiC-5 32-Bit Serial-Input Latched Sink Drivers Allowable Power Dissipation, P 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 A6832EP °C/W θ AMBIENT TEMPERATURE (º C) *Additional thermal information is available on the Allegro Web site. A6832SEP/A6832EEP 7 OUT OUT 17 12 www.allegromicro.com 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 ...

Page 6

... DABiC-5 32-Bit Serial-Input Latched Sink Drivers A6832SEP and A6832EEP 0.319 0.291 0.021 0.013 0.319 0.291 0.050 BSC 0.020 MIN 0.180 0.165 8.10 7.39 0.533 0.331 8.10 7.39 1.27 BSC 0.51 MIN 4.57 4.20 NOTES: 1. Exact body and lead configuration at vendor’s option within limits shown. 2. Lead spacing tolerance is non-cumulative. ...

Page 7

... The in for ma tion in clud ed herein is believed rate and reliable. How ev er, Allegro MicroSystems, Inc. assumes no re spon - si bil i ty for its use; nor for any in fringe ment of patents or other rights of third parties which may result from its use. ...

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