a6b595 Allegro MicroSystems, Inc., a6b595 Datasheet
a6b595
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a6b595 Summary of contents
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... Copper lead frames, reduced supply current requirements, and low on-state resistance allow both devices to sink 150 mA from all outputs continuously, to ambient temperatures over 85°C. The A6B595 is furnished in a 20-pin dual in-line plastic package and a 20-pin wide-body, small-outline plastic package (SOICW) with gull-wing leads. The Pb (lead) free versions (suffix -T) have 100% matte tin leadframe plating ...
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... A6B595 Selection Guide Part Number A6B595KA-T 18-pin DIP A6B595KLW-T 20-pin SOICW A6B595KLWTR-T 20-pin SOICW Absolute Maximum Ratings Characteristic Logic Supply Voltage Output Voltage Input Voltage Range Output Drain Current Single-Pulse Avalanche Energy Operating Ambient Temperature Maximum Junction Temperature Storage Temperature Caution: These CMOS devices have input static protection (Class 3) but are still susceptible to damage if exposed to extremely high static electrical charges ...
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... A6B595 Terminal No. Terminal Name LOGIC SUPPLY 3 SERIAL DATA IN 4-7 OUT 0-3 8 CLEAR 9 OUTPUT ENABLE 10 GROUND 11 GROUND 12 STROBE 13 CLOCK 14-17 OUT 4-7 18 SERIAL DATA OUT 19 GROUND 20 NC NOTE — Grounds (terminals 10, 11, and 19) must be connected together externally. 8-Bit Serial-Input DMOS Power Driver PIN-OUT DIAGRAM NO NO ...
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... A6B595 LOGIC INPUTS RECOMMENDED OPERATING CONDITIONS over operating temperature range Logic Supply Voltage Range High-Level Input Voltage, V ............................ ≥ 0.85V IH Low-level input voltage, V ................................. ≤ 0.15V IL Shift Register Contents Data Clock Input Input ... … … ...
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... A6B595 ELECTRICAL CHARACTERISTICS at T specifi ed). Characteristic Symbol Output Breakdown V (BR)DSX Voltage Off-State Output I DSX Current r Static Drain-Source DS(on) On-State Resistance Nominal Output I ON Current Logic Input Current SERIAL-DATA V OH Output Voltage V OL Prop. Delay Time t PLH t PHL Output Rise Time ...
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... A6B595 TIMING REQUIREMENTS and SPECIFICATIONS A. Data Active Time Before Clock Pulse (Data Set-Up Time), t .......................................... 20 ns su(D) B. Data Active Time After Clock Pulse (Data Hold Time), t .............................................. 20 ns h(D) C. Clock Pulse Width, t ............................................. 40 ns w(CLK) D. Time Between Clock Activation and Strobe, t ....................................................... 50 ns su(ST) E. Strobe Pulse Width, t ...
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... A6B595 TEST CIRCUITS (BR)DSX Single-Pulse Avalanche Energy Test Circuit and Waveforms 8-Bit Serial-Input DMOS Power Driver LOGIC SYMBOL Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 7 ...
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... A6B595 +0.25 1.52 –0.38 0.46 ±0.12 12.80±0. 20X 0.10 C 0.41 ±0.10 For Reference Only Dimensions in millimeters (Reference JEDEC MS-013 AC) Dimensions exclusive of mold flash, gate burrs, and dambar protrusions Exact case and lead configuration at supplier discretion within limits shown 8-Bit Serial-Input DMOS Power Driver Package A, 18-Pin DIP 22.86 ± ...
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... A6B595 Copyright ©1999-2008, Allegro MicroSystems, Inc. The products described here are manufactured under one or more U.S. patents or U.S. patents pending. Allegro MicroSystems, Inc. reserves the right to make, from time to time, such de par tures from the detail spec tions as may be required to per- mit improvements in the per for mance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the information being relied upon is current. Allegro’ ...