lm95221cimm-eng National Semiconductor Corporation, lm95221cimm-eng Datasheet - Page 11

• Manufacturer Part Number: lm95221cimm-eng
• Description: Dual Remote Diode Digital Temperature Sensor With Smbus Interface
• Manufacturer: National Semiconductor Corporation

1.0 Functional Description
1.8 SERIAL INTERFACE RESET
In the event that the SMBus Master is RESET while the
LM95221 is transmitting on the SMBDAT line, the LM95221
must be returned to a known state in the communication
protocol. This may be done in one of two ways:
1. When SMBDAT is LOW, the LM95221 SMBus state
2.0 LM95221 Registers
Command register selects which registers will be read from or written to. Data for this register should be transmitted during the
Command Byte of the SMBus write communication.
P0-P7: Command
Name
Status Register
Configuration Register
1-shot
Local Temperature MSB
Remote Temperature 1 MSB
Remote Temperature 2 MSB
Local Temperature LSB
Remote Temperature 1 LSB
Remote Temperature 2 LSB
Manufacturer ID
Revision ID
machine resets to the SMBus idle state if either SMB-
DAT or SMBCLK are held low for more than 35ms
(t
2.0 all devices are to timeout when either the SMBCLK
or SMBDAT lines are held low for 25-35ms. Therefore, to
insure a timeout of all devices on the bus the SMBCLK
or SMBDAT lines must be held low for at least 35ms.
TIMEOUT
). Note that according to SMBus specification
Command
P7
(Hex)
FEh
FFh
02h
03h
0Fh
10h
12h
20h
21h
22h
11h
P6
(Continued)
Default Value
Power-On
P5
(Hex)
Register Summary
00h
01h
61h
-
-
-
-
-
-
-
-
P4
Command
11
Read/Write
P3
2. When SMBDAT is HIGH, have the master initiate an
1.9 ONE-SHOT CONVERSION
The One-Shot register is used to initiate a single conversion
and comparison cycle when the device is in standby mode,
after which the device returns to standby. This is not a data
register and it is the write operation that causes the one-shot
conversion. The data written to this address is irrelevant and
is not stored. A zero will always be read from this register.
R/W
WO
RO
RO
RO
RO
RO
RO
RO
RO
RO
SMBus start. The LM95221 will respond properly to an
SMBus start condition at any point during the communi-
cation. After the start the LM95221 will expect an SMBus
Address address byte.
P2
P1
# of used
bits
3
4
8
8
8
2
3
3
-
P0
Comments
2 status bits and 1 busy bit
Includes conversion rate
control
Activates one conversion for
all 3 channels if the chip is in
standby mode (i.e.
RUN/STOP bit = 1). Data
transmitted by the host is
ignored by the LM95221.
All unused bits will report zero
All unused bits will report zero
All unused bits will report zero
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