lm96570sqx National Semiconductor Corporation, lm96570sqx Datasheet - Page 5

• Manufacturer Part Number: lm96570sqx
• Description: Lm96570 Product Brief Ultrasound Configurable Transmit Beamformer
• Manufacturer: National Semiconductor Corporation

PLL DIFFERENTIAL REFERENCE CLOCK DC SPECIFICATIONS
V
V
R
PLL 1.8V LVCMOS SINGLE-ENDED REFERENCE CLOCK DC SPECIFICATIONS
V
V
R
3.3V I/O DC SPECIFICATIONS
V
V
I
V
V
I
t
t
t
t
t
t
t
t
t
t
t
f
IN-H/L
O-H/L
LES
LEH
LEHI
WS
WH
RS
RH
SCLKR
SCLKF
SCLKH
SCLKL
SCLK
ID
ICM
IH
IL
IH
IL
OH
OL
IN
IN
Digital Electrical Characteristics
Unless otherwise stated, the following conditions apply VIO = +3.3V, VDDA = VDDC = +1.8V, T
Serial Interface Timing Characteristics
Unless otherwise stated, the following conditions apply VIO = +3.3V, VDDA = VDDC = +1.8V, T
Note 1: Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the device
can or should be operated at these limits.
Operating Ratings indicate conditions for which the device is guaranteed to be functional, but do not guarantee specific performance limits. Guaranteed speci-
fications and test conditions are specified in the Electrical Characteristics section. Operation of the device beyond the Operating Ratings is not recommended as
it may degrade the lifetime of the device.
Note 2: The combination of common mode and voltage swing on the clock input must ensure that the positive voltage peaks are not above VDDA and the negative
voltage peaks are not below AGND.
Note 3: The maximum power dissipation is a function of T
P
Note 4: Human Body Model, applicable std. JESD22–A114–C. Machine Model, applicable std. JESD22–A115–A. Field induced Charge Device Model, applicable
std. JESD22–C101–C.
D
Symbol
Symbol
= (T
JMAX
- T
A
)/ θ
PLL Reference Clock
Differential Input Amplitude
PLL Reference Clock Input
Common Mode Voltage
Single-ended Input
Resistance
LVCMOS Input “HI” Voltage Pin 13. Register 1B[0] = 1
LVCMOS Input “LO”
Voltage
LVCMOS Input Resistance Pin 13 = 0V or VIO
Logic Input “HI” Voltage
Logic Input “LO” Voltage
Input Current
Logical Output “HI” Voltage I
Logical Output “LO” Voltage I
Logic Output Current
sLE Setup Time
sLE Hold Time
sLE HI Time
sWR Setup Time
sWR Hold Time
sRD Data Valid Setup Time
sRD Data Valid Hold Time
sCLK Rise Time
sCLK Fall Time
sCLK High Time
sCLK Low Time
sCLK Frequency
JA
. All numbers apply for package soldered directly into a 2 layer PC board with zero air flow.
Parameter
Parameter
AC Coupled to pins 13 & 14. 1B[0] = 0
(see
Pins 13 & 14 bias voltage, VICM
X VDDA
Pin 13. Register 1B[0] = 1
OH
OL
JMAX
= 2 mA
= 2 mA
(Note
, θ
JA
and T
2))
Conditions
Conditions
A
. The maximum allowable power dissipation at any ambient temperature is
5
≈
0.5
Min
Min
200
1.5
2.2
2.9
1.4
1.9
2.4
1.4
2.4
2.4
3.4
−1
A
A
= 25°C.
= 25°C.
Typ
±10
Typ
400
0.9
6.3
6.2
1.7
1.7
11
11
Max
0.34
Max
0.3
0.5
80
1
www.national.com
Units
MHz
Unit
mV
mA
kΩ
kΩ
µA
ns
ns
ns
V
V
V
V