lm76chmx-5 National Semiconductor Corporation, lm76chmx-5 Datasheet - Page 10

• Manufacturer Part Number: lm76chmx-5
• Description: ?0.5?c, ?1?c, 12-bit + Sign Digital Temperature Sensor And Thermal Window Comparator With Two-wire Interface
• Manufacturer: National Semiconductor Corporation

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1.9 POINTER REGISTER
(Selects which registers will be read from or written to):
P0–P2: Register Select:
P3–P7: Must be kept zero.
D0–D2: Status Bits
D3–D15: Temperature Data. One LSB = 0.0625˚C. Two’s
complement format.
D0: Shutdown - When set to 1 the LM76 goes to low power
shutdown mode. Power up default of “0”.
D1: Interrupt mode - 0 is Comparator Interrupt mode, 1 is
Event Interrupt mode. Power up default of “0”.
D2, D3: T_CRIT_A and INT Polarity - 0 is active low, 1 is
active high. Outputs are open-drain. Power up default of “0”
D0–D2: Undefined
D3–D15: T
Data. Power up default is T
T_CRIT = 80˚C, T
(Read Only):
(Read/Write):
(Read/Write):
Sign
Sign
D15
D15
D7
0
MSB
MSB
D14
D14
HYST
, T
Bit 10
Bit 10
D13
D13
HYST
LOW
D6
, T
0
= 2˚C.
HIGH
Bit 9
Bit 9
D12
D12
LOW
or T_CRIT Trip Temperature
P2
Bit 8
Bit 8
0
0
0
0
1
1
D11
D11
P7
= 10˚C, T
0
D5
0
P1
0
0
1
1
0
0
Bit 7
D10
D10
Bit7
P6
0
HIGH
P0
0
1
0
1
0
1
Fault Queue
Bit 6
Bit6
P5
D9
D9
0
= 64˚C,
Temperature (Read only) (Power-up
default)
Configuration (Read/Write)
T
T_CRIT (Read/Write)
T
T
HYST
LOW
HIGH
D4
Bit 5
(Read/Write)
P4
Bit5
(Read/Write)
D8
D8
(Read/Write)
0
10
INT Polarity
Bit 4
Bit 4
P3
0
D7
D7
1.10 TEMPERATURE REGISTER
1.11 CONFIGURATION REGISTER
D4: Fault Queue - When set to 1 the Fault Queu is enabled,
see Section 1.7. Power up default of “0”.
D5–D7: These bits are used for production testing and must
be kept zero for normal operation.
1.12 T
T
T
Avoid programming setpoints so close that their hysteresis
values overlap. See Section 1.1.
HYST
LOW
Register
D3
.
P2
HYST
Bit 3
Bit 3
is subtracted from T
D6
D6
Register Select
, T
LOW
P1
T_CRIT_A
Bit 2
Bit 2
D5
D5
Polarity
, T
D2
HIGH
P0
Bit 1
Bit 1
D4
D4
AND T_CRIT_A REGISTERS
HIGH
INT Mode
Bit 0
Bit 0
D3
D3
, and T_CRIT, and added to
D1
CRIT
D2
D2
X
Status Bits
Shutdown
HIGH
D1
D1
X
D0
LOW
D0
D0
X