tc5747 ETC-unknow, tc5747 Datasheet

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tc5747

Manufacturer Part Number
tc5747
Description
Single Chip Cmos Imager With Integrated Image Signal Processor Jpeg Codec
Manufacturer
ETC-unknow
Datasheet
Version 1.8
Products and specifications discussed herein are for evaluation and reference purposes only and are subject to change by TransChip
without notice. The information in this document is not a warranty, does not form part of any quotation or contract and does not convey
a license under intellectual property rights.
Copyright © TransChip Israel Research Center, Ltd., 2005.
Single Chip CMOS Imager with Integrated
Image Signal Processor and JPEG Codec
21 November 2005

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tc5747 Summary of contents

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Version 1.8 Products and specifications discussed herein are for evaluation and reference purposes only and are subject to change by TransChip without notice. The information in this document is not a warranty, does not form part of any quotation or ...

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... RESET AND CLOCK .......................................................................................................................................... 11 3 ....................................................................................................................................... 11 OW OWER ODES 3.1.1 Startup ....................................................................................................................................................... 11 3.1.2 Bypass........................................................................................................................................................ 11 3.1.3 Power Down .............................................................................................................................................. 11 3.2 PLL C ................................................................................................................................... 11 ONFIGURATIONS 3 EVICE NITIALIZATION EQUENCE 4. TC5747MF24L INTERFACES ........................................................................................................................... ................................................................................................................................... 13 ERIAL NTERFACE 4.1.1 Overview .................................................................................................................................................... 13 4.1.2 Mode of Operation..................................................................................................................................... 14 4 ARALLEL IDEO NTERFACE 4.2.1 Parallel Mode of Operation....................................................................................................................... 17 4.2.2 External Chip-Select .................................................................................................................................. 19 4.2.3 Qualified Clock Mode ................................................................................................................................ 19 4.2.4 VALIDH Configured as WR# ...

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... UTPUT NTERFACE 6 ERIAL IDEO UTPUT LOCK 6 SSI ERIAL IDEO UTPUT 2 6.10 I C-C I OMPATIBLE NTERFACE 7. MECHANICAL AND ELECTRICAL DRAWINGS ........................................................................................ 36 7.1 TC5747MF24L 24- P PIN ACKAGE 7 ...................................................................................................................................... 38 ENS PECIFICATION ..................................................................................................................... 30 C ...................................................................................................... 30 ONDITIONS ............................................................................................................... LOCK UALIFIED ODE HARACTERISTICS AMERA NTERFACE ODE ...

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... IDEO UTPUT F 26 SSI IGURE ERIAL IDEO UTPUT 2 F 27: I C-C I IGURE OMPATIBLE NTERFACE F 28: TC5747 24- M IGURE PIN ODULE F 29: TC5747 24- M IGURE PIN ODULE List of Figures D ......................................................................................................... 5 IAGRAM ......................................................................................................................... 7 ............................................................................................................................. 12 STOP C ........................................................................................... 14 ONDITIONS (N) A ..................................................................................................... 16 CCESSES T ............................................................................................................. 17 IMING Q S .......................................................................................... 17 UALIFY IGNALS ...................................................................................................................... 18 ...

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... T 1: TC5747 S ................................................................................................................................... 3 ABLE PECIFICATIONS ................................................................................................................................... 4 ABLE PIN ODULE IN IST ABLE NALOG LOCK ATE ODES ..................................................................................................................................... 23 ABLE RANS HIP ARKERS T 5: ITU 656 M ........................................................................................................................................... 24 ABLE ARKERS ABLE BSOLUTE AXIMUM ATINGS ABLE ...

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... Introduction 1. The TC5747 is a single chip VGA (640 lines over 480 pixels) color CMOS sensor with an integrated color processing and JPEG codec designed to meet the requirements of cellular devices with low power consumption and miniature size. An embedded programmable core with dedicated hardware performs the extensive color processing ...

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... TC5747 Data Sheet Single Chip CMOS Imager JPEG Codec Real-time JPEG encoder and decoder for still images and M-JPEG for motion video Compression VGA YUV 422 format images Decompression VGA resolution, 4:2:2, 4:1:1, 4:2:0 format images Programmable compression ratio 1.8 bits/pixel for VGA image ...

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... Contrast, brightness, saturation, sharpening, windowing, lookup table Camera module Camera module package with lens, optional flex cable or board-to- board connector Sensitivity 4V/lux-sec (including gain) 6-bit host bus interface compatible interface UART Used also to read JPEG images Table 1: TC5747 Specifications TransChip © 3 ...

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... TC5747 Data Sheet Single Chip CMOS Imager 1.3 Compact 24-pin Camera Module The 24-pin camera module option uses I Pin Name # I/O SCLK 1 I AGND 2 I AVDD28 3 I RESET CLK_IN DGND 6 I DOUT[1]/CSDAT# (*) 7 I/O DYUV[0] 8 DYUV[1] 9 I/O 10 I/O DYUV[2] 11 I/O DYUV[3] DYUV[4] 12 I/O DYUV[5] 13 DYUV[6] ...

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... TC5747 Preliminary Data Sheet Single Chip CMOS Imager Functional Description 2. The figure below shows the main functional blocks of the TC5747 and the basic signal flow. Figure 1: TC5747 Functional Block Diagram 2.1 CONT The unit controls the TC5747 units via a central programming bus. Its operation is synchronized with CONT the frame image sequence through several interrupt sources ...

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... JPEG 2.6 PVI and SVI The Parallel Video Interface ( ) and Serial Video Interface ( PVI TC5747 device. Each interface can be configured to output one of several streams ( ). The can be configured as a parallel video interface serial output interface. JPEG PVI or unit for Bayer output ...

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... TC5747 Preliminary Data Sheet Single Chip CMOS Imager 2.7 Imager and Address Generator The imager includes a VGA size pixel array, gain, double sampling, black pixel and readout circuits and ADC. The address generator receives timing signals from the control unit and produces the sequence signals to the pixel array for exposure control, read and reset operations ...

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... The TC5747 is fully controlled by the embedded microcontroller. Once the firmware, which is supplied by TransChip, is loaded, the embedded microcontroller sets the appropriate registers, and runs the automatic image processing algorithms. An external host does not need to access TC5747 registers and set values, nor does it need to run any algorithm. An easy to use API (Application Programming Interface) is provided to set or adjust various camera controls ...

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... TC5747 Preliminary Data Sheet Single Chip CMOS Imager TransChip supplies sample C code, which shows how to upload the firmware and use the host commands (software API). The sample includes all the needed C header files. The supplied firmware comes with preset default values for the various controls. Thus even if no single host commands is performed the firmware ensures that the sensor is running properly according to a preset default set ...

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... TC5747 Data Sheet Single Chip CMOS Imager The -compressed image can be transmitted either on the parallel video output interface or on the serial JPEG video output interface. Alternatively, the host can read the 2 code memory via the I C interface. The unit can optionally create also a thumbnail image for the full resolution compressed image. ...

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... TC5747 Preliminary Data Sheet Single Chip CMOS Imager Reset and Clock 3. 3.1 Low Power Modes The chip operation is controlled by two bits [ Chip operation modes [ ]: PS1, PS2 – Startup 00 – Full operation 01 – Sleep 11 – Power down 10 3.1.1 Startup The camera powers up at start up mode “ ...

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... TC5747 Data Sheet Single Chip CMOS Imager Each of the two output units, the PVI clock. Each clock, and is configured separately. rclkp rclks 3.3 Device Initialization Sequence PS1/2 PS1/2 PowerDown =01 Startup =00 PowerDown =01 Startup =00 RESET_N RESET_N CLKIN CLKIN BYPASS BYPASS PLL_PD PLL_PD RCLK RCLK The Initialization sequence includes the following steps: After system power-up, the Power Save pins should be put into Startup mode ...

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... I C Serial Interface 4.1.1 Overview 2 The I C interface is a two-wire bi-directional serial bus. The TC5747 can operate as a slave device only. Both wires ( and ) are connected to a positive supply via a pull-up resistor, and when the bus is free SCL SDA both lines are high. The output stage of the device must have an open-drain or open collector type IO cell so that a wired-AND function between all devices that are connected on the bus can be performed ...

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... R/W# the SDA line as acknowledge procedure. The TC5747 expects the first two bytes after the address byte to be the register address of the first register that read or written by the host. Programming is done in host commands level which is translated into a series of register level commands. ...

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... TC5747 Preliminary Data Sheet Single Chip CMOS Imager 2 Figure Host-Write Access 2 Figure Host-Read Access TransChip 15 ...

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... TC5747 Data Sheet Single Chip CMOS Imager Figure 8: I The host should activate the STOP condition if a direction change is needed Host-Read Multiple (N) Accesses TransChip 16 ...

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... TC5747 Preliminary Data Sheet Single Chip CMOS Imager 4.2 Parallel Video Interface (PVI) The PVI generates the video output of the TC5747. The interface consists of a vertical frame-start signal and a 10-bit parallel data bus with clock and qualify signals. It supports parallel and serial modes of operation. 4.2.1 ...

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... TC5747 Data Sheet Single Chip CMOS Imager The bus carries either the Bayer grid data, the DOUT[9: code according to the RGB666 RGB444 JPEG Bayer Grid data is left-justified. 10-bit Bayer resides on DOUT[9:0] 9-bit Bayer resides on DOUT[9:1] 8-bit Bayer resides on DOUT[9:2] The 8-bit YUV data resides on the ...

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... VALIDV VCLKOUT 4.2.3 Qualified Clock Mode The TC5747 supports a mode where the parallel interface. Figure 12: PVI YUV Output Format is double the output clock rate for pin is active-low, i.e. when low the CSDAT# is high these outputs are put in a tri-state position. The pin ...

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... TC5747 Data Sheet Single Chip CMOS Imager 4.2.4 VALIDH Configured as WR# The pin may be configured to work as a WRITE signal for applications requiring that the video data VALIDH is being written into a device. The polarity is programmable. The data is marked as valid only when the pin is active. The data should be sampled on the trailing edge of the ...

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... Single Chip CMOS Imager 4.2.6 Data 4.2.6.1 General The type of data ( Bayer, RGB, YCrCb 4:2:2 TC5747 programming registers, using host commands. The type of data also defines the frequency of the TC5747’s output clock signal. 4.2.6.2 Bayer Output When output is selected, the data volume is one byte per pixel. Bayer If Data-Markers are added, 8 more bytes per line must be taken into consideration in the image buffer that is allocated for the application ...

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... TC5747 Data Sheet Single Chip CMOS Imager 4.2.6.5 RGB666 Output When output is selected, the data volume is two 9-bit “ words” per pixel. Two modes can be selected RGB666 for data. RGB666 Two-transfers Mode When output is selected, the data volume is two 9-bit “ words” per pixel. No extra pixels are ...

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... TC5747 Preliminary Data Sheet Single Chip CMOS Imager 4.2.7 Data Markers Extra optional data markers are inserted at the beginning and end of each image line. The user may select between TransChip-specific markers, and markers that conform to the 4.2.7.1 TransChip Markers A “ Timing signal” or Marker is defined in the bytes holding reserved values of function is defined in the standard ...

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... TC5747 Data Sheet Single Chip CMOS Imager 4.2.7.2 ITU 656 Markers A “ Timing signal” or Marker is defined in the bytes holding reserved values of function is defined in the standard. Bits [7:4] of the Marker-content byte carry the marker information: Bit [7] – Always 1 to avoid 0x00 code Bit [6] – F – field 0 or field 1 Bit [5] – ...

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... TC5747 Preliminary Data Sheet Single Chip CMOS Imager 4.2.7.3 Avoiding Marker Emulation When the Send-Markers mode is enabled, care has to be taken to avoid marker-emulation inside the data itself. When output mode is selected, there is no contention between marker header contents and YCrCb 4:2:2 the transmitted data, because the Y data values are limited to the range of 16-235, and the data values are limited to the 16-240 range ...

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... DSCLK signal from its general clock input signal. – Serial Data output pin. DSDAT The TC5747 acts as a master of the interface. It activates the serial clock signal when there are valid data to be sent out. Serial Clock Polarity – Clock is inactive at zero Serial Clock Phase – ...

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... Frame signal in early-frame mode DSFRM The TC5747 acts as a master of the interface. It activates the Frame signal one clock period before there is valid data to be sent out. Transfer datum size configurable. There are three options: Transfer datum size is a single byte. ...

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... The gated option should be used when DSCLK is in the Frame-transfer mode. DSFRM 4.3 Serial Video Interface The TC5747 Serial Video interface unit is identical to the PVI unit described above, with two exceptions: Supports only serial interface Support also input of data. The data input is controlled through the I SSI direction provides a high speed input serial interface for decompression of JPEG images ...

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... The API is based on a set of defined host commands. The TC5747 is controlled by an embedded microcontroller. The microcontroller runs the firmware that is supplied by TransChip. The microcontroller receives the host commands, and executes them to perform various camera control functions ...

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... TC5747 Data Sheet Single Chip CMOS Imager AC/DC Specifications 6. The TC5747 chip excels in low power consumption 6.1 Absolute Maximum Ratings Symbol Parameter DC supply Voltage V DD Storage Temperature T A 6.2 Recommended Operating Conditions Symbol Parameter DC supply Voltage – 2.8V nominal V DD Operating Temperature T A Table 7: Recommended Operating Conditions 6 ...

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... TC5747 Preliminary Data Sheet Single Chip CMOS Imager 6.4 Parallel Video Output Clock Qualified Mode AC Characteristics Figure 21: Parallel Video Output Clock Qualified Mode Parameter Description Data setup before effective edge of Tsu Th Table 9: Parallel Video Output Clock Qualified Mode AC Characteristics * Results depend on device frequency and mode. The results in this table are for 32MHz, PVI CLK = clk_in ...

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... TC5747 Data Sheet Single Chip CMOS Imager 6.6 Parallel Video Output Interface AC Characteristics VCLKOUT VCLKOUT VALIDH/ VALIDH/ VALIDV VALIDV DOUT[9:0] DOUT[9:0] Figure 23: Parallel Video Output Interface Signals Parameter Description Data setup before effective edge of Tsu VCLKOUT Th Table 11: Parallel Video Output Interface AC Characteristics 6 ...

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... TC5747 Preliminary Data Sheet Single Chip CMOS Imager 6.8 Serial Video Output Clock Qualified mode AC Characteristics Figure 25: Serial Video Output Clock Qualified mode AC Parameter Description Data setup ( DSDAT Tsersu Data hold ( and DSDAT Tserh Table 12: Serial Video Output Clock Qualified mode AC Characteristics * Results depend on device frequency and mode ...

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... TC5747 Data Sheet Single Chip CMOS Imager 6.10 I C-Compatible Interface AC Characteristics 2 2 Figure 27: I C-Compatible Interface TransChip 34 ...

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... TC5747 Preliminary Data Sheet Single Chip CMOS Imager Parameter Description Maximum Fmax Tcyc SCLK Start condition Tstsu Start condition Tsth Tih SDIN SDIN Tisu Stop condition Tpsu Toh SDIN SDIN Tosu Table 14: I Note: Data entered is calculated for 400KHz Specifications Min ...

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... TC5747 Data Sheet Single Chip CMOS Imager Mechanical and Electrical Drawings 7. 7.1 TC5747MF24L 24-pin Package Following is a mechanical drawing of the TC5747MF24L 24-pin module. Figure 28: TC5747 24-pin Module Mechanical Drawing TransChip 36 ...

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... TC5747 Preliminary Data Sheet Single Chip CMOS Imager Figure 29: TC5747 24-pin Module Mechanical Drawing Continued TransChip 37 ...

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... TC5747 Data Sheet Single Chip CMOS Imager 7.2 Lens Specification Characteristic Material Structure Effective Focal Length Focal Range F Number Angle of View (FOV) Focus IR Filter Resolution (MTF) for RGB Relative Illumination TV Distortion Module Height 1/4 " Lens module Heat resistant plastic Three element (one glass and two plastic) 3 ...

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