MC100EL52DT ON Semiconductor, MC100EL52DT Datasheet - Page 2

• Manufacturer Part Number: MC100EL52DT
• Description: IC FLIP FLOP ECL DIFF CLK 8TSSOP
• Manufacturer: ON Semiconductor
• Series: 100ELr
• Type: D-Typer

Specifications of MC100EL52DT

• Function: Standard
• Output Type: Differential
• Number Of Elements: 1
• Number Of Bits Per Element: 1
• Frequency - Clock: 2.8GHz
• Delay Time - Propagation: 365ps
• Trigger Type: Positive Edge
• Voltage - Supply: 4.2 V ~ 5.7 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-TSSOP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Current - Output High, Low: -
• Other names: MC100EL52DTOS

Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. JEDEC standard multilayer board − 2S2P (2 signal, 2 power)
Table 3. MAXIMUM RATINGS
V
V
V
I
T
T
q
q
q
q
T
q
Symbol
out
A
stg
JA
JC
JA
JC
sol
JC
CC
EE
I
Figure 1. Logic Diagram and Pinout Assignment
CLK
CLK
PECL Mode Power Supply
NECL Mode Power Supply
PECL Mode Input Voltage
NECL Mode Input Voltage
Output Current
Operating Temperature Range
Storage Temperature Range
Thermal Resistance (Junction−to−Ambient)
Thermal Resistance (Junction−to−Case)
Thermal Resistance (Junction−to−Ambient)
Thermal Resistance (Junction−to−Case)
Wave Solder
Thermal Resistance (Junction−to−Case)
D
D
1
2
3
4
Parameter
D
Pb−Free
Pb
8
7
6
5
http://onsemi.com
V
V
V
V
Continuous
Surge
0 lfpm
500 lfpm
Standard Board
0 lfpm
500 lfpm
Standard Board
<2 to 3 sec @ 248°C
<2 to 3 sec @ 260°C
(Note 1)
EE
CC
EE
CC
V
Q
Q
V
CC
EE
Condition 1
= 0 V
= 0 V
= 0 V
= 0 V
2
Table 1. TRUTH TABLE
Z = LOW to HIGH Transition
* Pin will default low when left open.
Table 2. PIN DESCRIPTION
D, D
CLK, CLK
Q, Q
V
V
EP
CC
EE
V
V
8 SOIC
8 SOIC
8 SOIC
8 TSSOP
8 TSSOP
8 TSSOP
DFN8
PIN
I
I
 V
 V
D*
H
L
Condition 2
CC
EE
(DFN8 only) Thermal exposed
pad must be connected to a suf-
ficient thermal conduit. Electric-
ally connect to the most negative
supply (GND) or leave uncon-
nected, floating open.
ECL Data Input
ECL Clock Input
ECL Data Output
Positive Supply
Negative Supply
CLK*
FUNCTION
Z
Z
41 to 44 ± 5%
−65 to +150
−40 to +85
41 to 44
35 to 40
Rating
100
190
130
185
140
265
265
−8
−6
50
8
6
Q
H
L
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
Unit
mA
mA
°C
°C
°C
V
V
V
V