a8290 Allegro MicroSystems, Inc., a8290 Datasheet - Page 11

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a8290

Manufacturer Part Number
a8290
Description
A8290 Single Lnb Supply And Control Voltage Regulator
Manufacturer
Allegro MicroSystems, Inc.
Datasheet
A8290
recognizes a fault condition, or at power-on, when the main sup-
ply, V
operating conditions. It is only reset to inactive when the I
master addresses the A8290 with the Read/Write bit set (caus-
ing a read). Fault conditions are indicated by the TSD, VUV, and
OCP bits and are latched in the Status register. See the Status reg-
ister section for full description.
terrupt. All these bits are continually updated, apart from the DIS
bit, which changes when the LNB is either disabled, intentionally
or due to a fault, or is enabled.
slaves connected to the interrupt line in sequence, and then reads
The IRQ output becomes active when either the A8290 first
The DIS, PNG, CAD and TDET status bits do not cause an in-
When the master recognizes an interrupt, it addresses all
IN
, and the internal logic supply, V
Figure 4. I
2
C™ Interface. Read sequences after interrupt request.
SDA
SCL
IRQ
Fault
Event
Single LNB Supply and Control Voltage Regulator
Start
REG
0
1
, reach the correct
0
2
0
3
Address
1
4
0
5
Read after Interrupt
2
A1
6
C™
A0
7
R
1
8
the status register to determine which device is requesting atten-
tion. The A8290 latches all conditions in the Status register until
the completion of the data read. The action at the resampling
point is further defined in the Status Register section. The bits in
the Status register are defined such that the all-zero condition in-
dicates that the A8290 is fully active with no fault conditions.
does not respond to any requests until the internal logic supply
V
point, the IRQ output goes active, and the VUV bit is set. After
the A8290 acknowledges the address, the IRQ flag is reset. After
the master reads the status registers, the registers are updated with
the VUV reset.
AK
9
REG
When V
D7
has reached its operating level. Once V
D6
D5
Status Register 1
IN
is initially applied, the I
D4
D3
D2
D1
115 Northeast Cutoff, Box 15036
Allegro MicroSystems, Inc.
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
D0
NAK
Reload
Status Register
Stop
2
C™-compatible interface
REG
has reached this
11

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