lnbh25pqr STMicroelectronics, lnbh25pqr Datasheet - Page 10

• Manufacturer Part Number: lnbh25pqr
• Description: Lnb Supply And Control Ic With Step-up And I²c Interface
• Manufacturer: STMicroelectronics

Application information
2.19
2.20
2.21
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COMP: boost capacitor ESR
DC-DC converter compensation loop can be optimized in order to work well with high or low
ESR capacitors (on the V
(COMP) can be set to “1” or “0”. It is recommended to reset this bit to “0” unless using high
ESR capacitors.
OLF: overcurrent and short-circuit protection and diagnostic
In order to reduce the total power dissipation during an overload or a short-circuit condition,
the device is provided with a dynamic short-circuit protection. It is possible to set the short-
circuit current protection either statically (simple current clamp) or dynamically by the PCL
bit of the I²C DATA 3 register. When the PCL (pulsed current limiting) bit is set Io LOW, the
overcurrent protection circuit works dynamically: as soon as an overload is detected, the
output current is provided for T
programmed in the DATA 3 register) and after that, the output is set in shutdown for T
time of typically 900 ms. Simultaneously, the diagnostic OLF I²C bit of the system register is
set to “1” and the FLT pin is set to low level. After this time has elapsed, the output is
resumed for a time T
circuit cycles again through T
detected, normal operation is resumed and the OLF diagnostic bit is reset to LOW after a
register reading is done. Typical T
TIMER=1) and an internal timer determines it. This dynamic operation can greatly reduce
the power dissipation in short-circuit condition, still ensuring excellent power-on startup in
most conditions. However, there could be some cases in which a highly capacitive load on
the output may cause a difficult startup when the dynamic protection is chosen. This can be
solved by initiating any power startup in static mode (PCL=1) and, then, switching to the
dynamic mode (PCL=0) after a chosen amount of time depending on the output
capacitance. Also in static mode, the diagnostic OLF bit goes to “1” (and the FLT pin is set to
low) when the current clamp limit is reached and returns LOW when the overload condition
is cleared and register reading is done.
After the overload condition is removed, normal operation can be resumed in two ways,
according to the OLR I²C bit on the DATA 4 register.
If OLR=1, all VSEL 1..4 bits are reset to “0” and LNB output (V
enable output stage, the VSEL bits must be set again by the microprocessor, and the OLF
bit is reset to “0” after a register reading operation.
If OLR=0, output is automatically re-enabled as soon as the overload condition is removed,
and the OLF bit is reset to “0” after a register reading operation.
OTF: thermal protection and diagnostic
The LNBH25 is also protected against overheating: when the junction temperature exceeds
150 °C (typ.), the step-up converter and the linear regulator are shut off, the diagnostic OTF
bit in the STATUS1 register is set to “1” and the FLT pin is set to low level. After the
overtemperature condition is removed, normal operation can be resumed in two ways,
according to the THERM I²C bit on the DATA 4 register.
If THERM=1, all VSEL 1..4 bits are reset to “0” and LNB output (V
enable output stage, the VSEL bits must be set again by the microprocessor, while the OTF
bit is reset to “0” after a register reading operation.
If THERM=0, output is automatically re-enabled as soon as the overtemperature condition is
removed, while the OTF bit is reset to “0” after a register reading operation.
ON
. At the end of T
UP
pin). For this purpose, one I²C bit in the DATA 4 register
OFF
Doc ID 022433 Rev 3
ON
and T
ON
time (90 ms or 180 ms typ., according to the TIMER bit
+T
ON
ON
OFF
. At the end of a full T
, if the overload is still detected, the protection
time is 990 ms (if TIMER=0) or 1080 ms (if
OUT
ON
OUT
in which no overload is
pin) is disabled. To re-
pin) is disabled. To re-
LNBH25
OFF