iru1050 International Rectifier Corp., iru1050 Datasheet - Page 6

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iru1050

Manufacturer Part Number
iru1050
Description
5a Low Dropout Positive Adjustable Regulator -
Manufacturer
International Rectifier Corp.
Datasheet

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IRU1050
An example of a regulator design to meet the Intel P54C
VRE specification is given below.
Assume the specification for the processor as shown in
Table 1:
The first step is to select the voltage step allowed in the
output due to the output capacitor’s ESR:
1) Assuming the regulator’s initial accuracy plus the re-
6
Intel-P54C VRE
sistor divider tolerance is
nominal), then the total step allowed for the ESR and
the ESL is 47mV.
Assuming that the ESL drop is 10mV, the remain-
ing ESR step will be 37mV. Therefore the output
capacitor ESR must be:
The Sanyo MVGX series is a good choice to achieve
both price and performance goals. The 6MV1500GX,
1500mF, 6.3V has an ESR of less than 36mV typi-
cal. Selecting 5 of these capacitors in parallel has an
ESR of
The next step is to calculate the drop due to the ca-
pacitance discharge and make sure that this drop in
voltage is less than the selected ESL drop in the
previous step.
Processor
ESR [
Type of
Figure 5 - Typical regulator response
Table 1 - Processor Specification
LOAD
CURRENT
4.6
37
7.2mV which achieves our design goal.
to the fast load current step.
V
V
ESL
ESR
= 8mV
Nominal
3.50 V
V
OUT
LOAD CURRENT RISE TIME
T
I
4.6 A
MAX
53mV ( 1.5% of 3.5V
1050plt1-1.0
Output Tolerance
Max Allowed
100 mV
V
C
www.irf.com
2) The output capacitance is 531500mF = 7500mF
To set the output DC voltage, we need to select R1 and
R2:
3) Assuming R1=121V, 0.1%:
Finally, the input capacitor is selected as follows:
4) Assuming that the input voltage can drop 150mV be-
Select R2=218V, 0.1%
Selecting both R1 and R2 resistors to be 0.1% toler-
ance, results in the least amount of error introduced
by the resistor dividers leaving
for the IRU1050 reference which is within the initial
accuracy of the device.
fore the main power supply responds, and that the
main power supply response time is
the minimum input capacitance for a 4.6A load step
is given by:
The ESR should be less than:
Selecting two Sanyo 1500mF, the same type as the
output capacitors, meets our requirements.
R2 =
DVc =
Where:
Dt = 2ms is the regulator response time
C
ESR =
Where:
V
DV L Maximum regulator dropout voltage
DI L Load current step
ESR =
IN
DROP
=
(
4.6 3 50
L Input voltage drop allowed in step 4
V
V
Dt 3 DI
0.15
(V
(5 - 3.5 - 1.2 - 0.15)
OUT
REF
IN
C
- V
-1
)
OUT
3R1 =
4.6
= 1530mF
DI
=
- DV - V
2 3 4.6
7500
(
1.25
3.5
DROP
= 0.032V
= 1.2mV
-1
)
)
1.3% error budget
3121 = 217.8V
50ms, then
08/20/02
Rev. 1.8

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