attiny2313v ATMEL Corporation, attiny2313v Datasheet

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attiny2313v

Manufacturer Part Number
attiny2313v
Description
Attiny2313 8-bit With 2k Bytes Of In-system Programmable Flash
Manufacturer
ATMEL Corporation
Datasheet

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Features
Utilizes the AVR
AVR – High-performance and Low-power RISC Architecture
Data and Non-volatile Program and Data Memories
Peripheral Features
Special Microcontroller Features
I/O and Packages
Operating Voltages
Speed Grades
Typical Power Consumption
– 120 Powerful Instructions – Most Single Clock Cycle Execution
– 32 x 8 General Purpose Working Registers
– Fully Static Operation
– Up to 20 MIPS Throughput at 20 MHz
– 2K Bytes of In-System Self Programmable Flash
– 128 Bytes In-System Programmable EEPROM
– 128 Bytes Internal SRAM
– Programming Lock for Flash Program and EEPROM Data Security
– One 8-bit Timer/Counter with Separate Prescaler and Compare Mode
– One 16-bit Timer/Counter with Separate Prescaler, Compare and Capture Modes
– Four PWM Channels
– On-chip Analog Comparator
– Programmable Watchdog Timer with On-chip Oscillator
– USI – Universal Serial Interface
– Full Duplex USART
– debugWIRE On-chip Debugging
– In-System Programmable via SPI Port
– External and Internal Interrupt Sources
– Low-power Idle, Power-down, and Standby Modes
– Enhanced Power-on Reset Circuit
– Programmable Brown-out Detection Circuit
– Internal Calibrated Oscillator
– 18 Programmable I/O Lines
– 20-pin PDIP, 20-pin SOIC, 20-pad QFN/MLF
– 1.8 - 5.5V (ATtiny2313V)
– 2.7 - 5.5V (ATtiny2313)
– ATtiny2313V: 0 - 4 MHz @ 1.8 - 5.5V, 0 - 10 MHz @ 2.7 - 5.5V
– ATtiny2313: 0 - 10 MHz @ 2.7 - 5.5V, 0 - 20 MHz @ 4.5 - 5.5V
– Active Mode
– Power-down Mode
Endurance 10,000 Write/Erase Cycles
Endurance: 100,000 Write/Erase Cycles
1 MHz, 1.8V: 230 µA
32 kHz, 1.8V: 20 µA (including oscillator)
< 0.1 µA at 1.8V
®
RISC Architecture
8-bit
Microcontroller
with 2K Bytes
In-System
Programmable
Flash
ATtiny2313/V
Preliminary
Summary
Rev. 2543IS–AVR–04/06

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attiny2313v Summary of contents

Page 1

... PDIP, 20-pin SOIC, 20-pad QFN/MLF • Operating Voltages – 1.8 - 5.5V (ATtiny2313V) – 2.7 - 5.5V (ATtiny2313) • Speed Grades – ATtiny2313V MHz @ 1.8 - 5.5V MHz @ 2.7 - 5.5V – ATtiny2313 MHz @ 2.7 - 5.5V MHz @ 4.5 - 5.5V • Typical Power Consumption – Active Mode 1 MHz, 1.8V: 230 µA 32 kHz, 1.8V: 20 µA (including oscillator) – ...

Page 2

Pin Configurations Overview ATtiny2313/V 2 Figure 1. Pinout ATtiny2313 (RESET/dW) PA2 (RXD) PD0 (TXD) PD1 (XTAL2) PA1 (XTAL1) PA0 (CKOUT/XCK/INT0) PD2 (INT1) PD3 (T0) PD4 (OC0B/T1) PD5 GND (TXD) PD1 XTAL2) PA1 (XTAL1) PA0 (CKOUT/XCK/INT0) PD2 (INT1) PD3 NOTE: Bottom ...

Page 3

Block Diagram 2543IS–AVR–04/06 Figure 2. Block Diagram PA0 - PA2 PORTA DRIVERS DATA DIR. DATA REGISTER VCC REG. PORTA PORTA 8-BIT DATA BUS GND STACK PROGRAM POINTER COUNTER PROGRAM SRAM FLASH INSTRUCTION GENERAL REGISTER PURPOSE REGISTER INSTRUCTION DECODER CONTROL ALU ...

Page 4

ATtiny2313/V 4 The AVR core combines a rich instruction set with 32 general purpose working registers. All the 32 registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two independent registers to be accessed in one single instruction ...

Page 5

... Input to the inverting Oscillator amplifier and input to the internal clock operating circuit. XTAL1 is an alternate function for PA0. Output from the inverting Oscillator amplifier. XTAL2 is an alternate function for PA1. A comprehensive set of development tools, application notes and datasheets are avail- able for downloadon http://www.atmel.com/avr. ATtiny2313/V ...

Page 6

Register Summary Address Name Bit 7 0x3F (0x5F) SREG I 0x3E (0x5E) Reserved – 0x3D (0x5D) SPL SP7 0x3C (0x5C) OCR0B 0x3B (0x5B) GIMSK INT1 0x3A (0x5A) EIFR INTF1 0x39 (0x59) TIMSK TOIE1 0x38 (0x58) TIFR TOV1 0x37 (0x57) SPMCSR ...

Page 7

Note: 1. For compatibility with future devices, reserved bits should be written to zero if accessed. Reserved I/O memory addresses should never be written. 2. I/O Registers within the address range 0x00 - 0x1F are directly bit-accessible using the SBI ...

Page 8

Instruction Set Summary Mnemonics Operands ARITHMETIC AND LOGIC INSTRUCTIONS ADD Rd, Rr Add two Registers ADC Rd, Rr Add with Carry two Registers ADIW Rdl,K Add Immediate to Word SUB Rd, Rr Subtract two Registers SUBI Rd, K Subtract Constant ...

Page 9

Mnemonics Operands ROR Rd Rotate Right Through Carry ASR Rd Arithmetic Shift Right SWAP Rd Swap Nibbles BSET s Flag Set BCLR s Flag Clear BST Rr, b Bit Store from Register to T BLD Rd, b Bit load from ...

Page 10

... Wide, Plastic Gull Wing Small Outline Package (SOIC) 20M1 20-pad 0.8 mm Body, Quad Flat No-Lead/Micro Lead Frame Package (MLF) ATtiny2313/V 10 Ordering Code Package ATtiny2313V-10PI 20P3 (2) ATtiny2313V-10PU 20P3 ATtiny2313V-10SI 20S (2) ATtiny2313V-10SU 20S (2) ATtiny2313V-10MU 20M1 ATtiny2313-20PI 20P3 (2) ATtiny2313-20PU 20P3 ATtiny2313-20SI 20S (2) ATtiny2313-20SU 20S (2) ATtiny2313-20MU 20M1 Package Type (1) Operation Range Industrial 0° ...

Page 11

Packaging Information 20P3 A SEATING PLANE Notes: 1. This package conforms to JEDEC reference MS-001, Variation AD. 2. Dimensions D and E1 do not include mold Flash or Protrusion. Mold Flash or Protrusion shall not exceed 0.25 ...

Page 12

Top View e D Side View Notes: 1. This drawing is for general information only; refer to JEDEC Drawing MS-013, Variation AC for additional information. 2. Dimension "D" does not include mold Flash, protrusions or gate burrs. Mold Flash, ...

Page 13

D 1 Pin TOP VIEW D2 Pin #1 Notch (0. BOTTOM VIEW Reference JEDEC Standard MO-220, Fig. 1 (SAW Singulation) WGGD-5. Note: 2325 Orchard Parkway San Jose, CA 95131 R 2543IS–AVR–04/ ...

Page 14

Errata ATtiny2313 Rev B ATtiny2313 Rev A ATtiny2313/V 14 The revision in this section refers to the revision of the ATtiny2313 device. • Wrong values read after Erase Only operation • Parallel Programming does not work • Watchdog Timer Interrupt ...

Page 15

Datasheet Revision History Changes from Rev. 2514H-02/05 to Rev. 2514I-04/06 Changes from Rev. 2514G-10/04 to Rev. 2514H-02/05 Changes from Rev. 2514F-08/04 to Rev. 2514G-10/04 Changes from Rev. 2514E-04/04 to Rev. 2514F-08/04 2543IS–AVR–04/06 Please note that the referring page numbers in ...

Page 16

Changes from Rev. 2514D-03/04 to Rev. 2514E-04/04 Changes from Rev. 2514C-12/03 to Rev. 2514D-03/04 Changes from Rev. 2514B-09/03 to Rev. 2514C-12/03 Changes from Rev. 2514A-09/03 to Rev. 2514B-09/03 ATtiny2313 Moved Table 69 on page 161 and Table 70 ...

Page 17

... Atmel products are not suitable for, and shall not be used in, automotive applications. Atmel’s products are not intended, authorized, or warranted for use as components in applications intended to support or sustain life. © Atmel Corporation 2006. All rights reserved. Atmel are registered trademarks or trademarks of Atmel Corporation or its subsidiaries. Other terms and product names may be trademarks of others. Atmel Operations Memory ...

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