atmega165v ATMEL Corporation, atmega165v Datasheet

atmega165v

Manufacturer Part Number

atmega165v

Description

Atmega165 8-bit With 16k Bytes Of In-system Programmable Flash

Manufacturer

ATMEL Corporation

Datasheet

1.ATMEGA165V.pdf (19 pages)

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Features

•

High Performance, Low Power AVR

Advanced RISC Architecture

Non-volatile Program and Data Memories

JTAG (IEEE std. 1149.1 compliant) Interface

Peripheral Features

Special Microcontroller Features

I/O and Packages

Speed Grade:

Temperature range:

Ultra-Low Power Consumption

– 130 Powerful Instructions – Most Single Clock Cycle Execution

– 32 x 8 General Purpose Working Registers

– Fully Static Operation

– Up to 16 MIPS Throughput at 16 MHz

– On-Chip 2-cycle Multiplier

– 16K bytes of In-System Self-Programmable Flash

– Optional Boot Code Section with Independent Lock Bits

– 512 bytes EEPROM

– 1K byte Internal SRAM

– Programming Lock for Software Security

– Boundary-scan Capabilities According to the JTAG Standard

– Extensive On-chip Debug Support

– Programming of Flash, EEPROM, Fuses, and Lock Bits through the JTAG Interface

– Two 8-bit Timer/Counters with Separate Prescaler and Compare Mode

– One 16-bit Timer/Counter with Separate Prescaler, Compare Mode, and Capture

– Real Time Counter with Separate Oscillator

– Four PWM Channels

– 8-channel, 10-bit ADC

– Programmable Serial USART

– Master/Slave SPI Serial Interface

– Universal Serial Interface with Start Condition Detector

– Programmable Watchdog Timer with Separate On-chip Oscillator

– On-chip Analog Comparator

– Interrupt and Wake-up on Pin Change

– Power-on Reset and Programmable Brown-out Detection

– Internal Calibrated Oscillator

– External and Internal Interrupt Sources

– Five Sleep Modes: Idle, ADC Noise Reduction, Power-save, Power-down, and

– 53 Programmable I/O Lines

– 64-lead TQFP and 64-pad QFN/MLF

– ATmega165V: 0 - 4 MHz @ 1.8 - 5.5V, 0 - 8 MHz @ 2.7 - 5.5V

– ATmega165: 0 - 8 MHz @ 2.7 - 5.5V, 0 - 16 MHz @ 4.5 - 5.5V

– -40°C to 85°C Industrial

– Active Mode:

– Power-down Mode:

Mode

Standby

Endurance: 10,000 Write/Erase Cycles

In-System Programming by On-chip Boot Program

True Read-While-Write Operation

Endurance: 100,000 Write/Erase Cycles

1 MHz, 1.8V: 350µA

32 kHz, 1.8V: 20µA (including Oscillator)

0.1µA at 1.8V

8-Bit Microcontroller

Note: This is a summary document. A complete document

is available on our Web site at www.atmel.com.

8-bit

Microcontroller

with 16K Bytes

In-System

Programmable

Flash

ATmega165V

ATmega165

Preliminary

Summary

Notice:

Not recommended in new

designs.

2573FS–AVR–08/06

Related parts for atmega165v

atmega165v Summary of contents

Page 1

... Standby • I/O and Packages – 53 Programmable I/O Lines – 64-lead TQFP and 64-pad QFN/MLF • Speed Grade: – ATmega165V MHz @ 1.8 - 5.5V MHz @ 2.7 - 5.5V – ATmega165 MHz @ 2.7 - 5.5V MHz @ 4.5 - 5.5V • Temperature range: – -40°C to 85°C Industrial • Ultra-Low Power Consumption – Active Mode: 1 MHz, 1.8V: 350µ ...

Page 2

Pin Configurations Disclaimer ATmega165/V 2 Figure 1. Pinout ATmega165 DNC 1 (RXD/PCINT0) PE0 2 INDEX CORNER (TXD/PCINT1) PE1 3 (XCK/AIN0/PCINT2) PE2 4 (AIN1/PCINT3) PE3 5 (USCK/SCL/PCINT4) PE4 6 (DI/SDA/PCINT5) PE5 7 (DO/PCINT6) PE6 8 (CLKO/PCINT7) PE7 9 (SS/PCINT8) PB0 10 ...

Page 3

Overview The ATmega165 is a low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC architecture. By executing powerful instructions in a single clock cycle, the ATmega165 achieves throughputs approaching 1 MIPS per MHz allowing the system designer to optimize ...

Page 4

ATmega165/V 4 The AVR core combines a rich instruction set with 32 general purpose working registers. All the 32 registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two independent registers to be accessed in one single instruction ...

Page 5

Pin Descriptions VCC GND Port A (PA7..PA0) Port B (PB7..PB0) Port C (PC7..PC0) Port D (PD7..PD0) Port E (PE7..PE0) Port F (PF7..PF0) 2573FS–AVR–08/06 Digital supply voltage. Ground. Port 8-bit bi-directional I/O port with internal pull-up resistors (selected ...

Page 6

Port G (PG4..PG0) RESET XTAL1 XTAL2 AVCC AREF ATmega165/V 6 tors on pins PF7(TDI), PF5(TMS), and PF4(TCK) will be activated even if a reset occurs. Port F also serves the functions of the JTAG interface. Port 5-bit ...

Page 7

Register Summary Address Name Bit 7 (0xFF) Reserved – (0xFE) Reserved – (0xFD) Reserved – (0xFC) Reserved – (0xFB) Reserved – (0xFA) Reserved – (0xF9) Reserved – (0xF8) Reserved – (0xF7) Reserved – (0xF6) Reserved – (0xF5) Reserved – (0xF4) ...

Page 8

Address Name Bit 7 (0xBF) Reserved – (0xBE) Reserved – (0xBD) Reserved – (0xBC) Reserved – (0xBB) Reserved – (0xBA) USIDR (0xB9) USISR USISIF (0xB8) USICR USISIE (0xB7) Reserved – (0xB6) ASSR – (0xB5) Reserved – (0xB4) Reserved – (0xB3) ...

Page 9

Address Name Bit 7 (0x7D) Reserved – (0x7C) ADMUX REFS1 (0x7B) ADCSRB – (0x7A) ADCSRA ADEN (0x79) ADCH (0x78) ADCL (0x77) Reserved – (0x76) Reserved – (0x75) Reserved – (0x74) Reserved – (0x73) Reserved – (0x72) Reserved – (0x71) Reserved ...

Page 10

Address Name Bit 7 0x1B (0x3B) Reserved – 0x1A (0x3A) Reserved – 0x19 (0x39) Reserved – 0x18 (0x38) Reserved – 0x17 (0x37) TIFR2 – 0x16 (0x36) TIFR1 – 0x15 (0x35) TIFR0 – 0x14 (0x34) PORTG – 0x13 (0x33) DDRG – ...

Page 11

Instruction Set Summary Mnemonics Operands ARITHMETIC AND LOGIC INSTRUCTIONS ADD Rd, Rr Add two Registers ADC Rd, Rr Add with Carry two Registers ADIW Rdl,K Add Immediate to Word SUB Rd, Rr Subtract two Registers SUBI Rd, K Subtract Constant ...

Page 12

Mnemonics Operands BRIE k Branch if Interrupt Enabled BRID k Branch if Interrupt Disabled BIT AND BIT-TEST INSTRUCTIONS SBI P,b Set Bit in I/O Register CBI P,b Clear Bit in I/O Register LSL Rd Logical Shift Left LSR Rd Logical ...

Page 13

Mnemonics Operands POP Rd Pop Register from Stack MCU CONTROL INSTRUCTIONS NOP No Operation SLEEP Sleep WDR Watchdog Reset BREAK Break 2573FS–AVR–08/06 Description Rd ← STACK (see specific descr. for Sleep function) (see specific descr. for WDR/timer) For On-chip Debug ...

Page 14

... Thin (1.0 mm) Plastic Gull Wing Quad Flat Package (TQFP) 64M1 64-pad 1.0 mm body, lead pitch 0.50 mm, Quad Flat No-Lead/Micro Lead Frame Package (QFN/MLF) ATmega165/V 14 Ordering Code Package ATmega165V-8AI 64A (2) ATmega165V-8AU 64A ATmega165V-8MI 64M1 (2) ATmega165V-8MU 64M1 ATmega165-16AI 64A (2) ATmega165-16AU 64A ATmega165-16MI 64M1 (2) ATmega165-16MU 64M1 Package Type (1) Operation Range Industrial 0° ...

Page 15

Packaging Information 64A PIN 0˚~7˚ L Notes: 1. This package conforms to JEDEC reference MS-026, Variation AEB. 2. Dimensions D1 and E1 do not include mold protrusion. Allowable protrusion is 0.25 mm per side. Dimensions D1 and ...

Page 16

D Marked Pin TOP VIEW BOTTOM VIEW Note: 1. JEDEC Standard MO-220, (SAW Singulation) Fig. 1, VMMD. 2. Dimension and tolerance conform to ASMEY14.5M-1994. 2325 Orchard Parkway San Jose, CA 95131 ...

Page 17

Errata ATmega165 Rev A 2573FS–AVR–08/06 No known errata. ATmega165/V 17 ...

Page 18

Datasheet Revision History Changes from Rev. 2573E-07/06 to Rev. 2573F-08/06 Changes from Rev. 2573D-03/06 to Rev. 2573E-07/06 Changes from Rev. 2573C-03/06 to Rev. 2573D-03/06 Changes from Rev. 2573B-03/05 to Rev. 2573C-02/06 Changes from Rev. 2573A-06/04 to Rev. 2573B-03/05 ATmega165/V 18 ...

Page 19

... Atmel products are not suitable for, and shall not be used in, automotive applications. Atmel’s products are not intended, authorized, or warranted for use as components in applications intended to support or sustain life. © 2006 Atmel Corporation. All rights reserved. Atmel are registered trademarks or trademarks of Atmel Corporation or its subsidiaries. Other terms and product names may be trademarks of others. Atmel Operations Memory ...

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