atmega169v ATMEL Corporation, atmega169v Datasheet
atmega169v
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atmega169v Summary of contents
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... Standby • I/O and Packages – 53 Programmable I/O Lines – 64-lead TQFP and 64-pad QFN/MLF • Speed Grade: – ATmega169V MHz @ 1.8 - 5.5V MHz @ 2.7 - 5.5V – ATmega169 MHz @ 2.7 - 5.5V MHz @ 4.5 - 5.5V • Temperature range: – -40°C to 85°C Industrial • Ultra-Low Power Consumption – Active Mode: 1 MHz, 1.8V: 350µ ...
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Pin Configurations Disclaimer ATmega169/V 2 Figure 1. Pinout ATmega169 LCDCAP 1 (RXD/PCINT0) PE0 2 INDEX CORNER (TXD/PCINT1) PE1 3 (XCK/AIN0/PCINT2) PE2 4 (AIN1/PCINT3) PE3 5 (USCK/SCL/PCINT4) PE4 6 (DI/SDA/PCINT5) PE5 7 (DO/PCINT6) PE6 8 (CLKO/PCINT7) PE7 9 (SS/PCINT8) PB0 10 ...
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Overview The ATmega169 is a low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC architecture. By executing powerful instructions in a single clock cycle, the ATmega169 achieves throughputs approaching 1 MIPS per MHz allowing the system designer to optimize ...
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ATmega169/V 4 The AVR core combines a rich instruction set with 32 general purpose working registers. All the 32 registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two independent registers to be accessed in one single instruction ...
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Pin Descriptions VCC GND Port A (PA7..PA0) Port B (PB7..PB0) Port C (PC7..PC0) Port D (PD7..PD0) Port E (PE7..PE0) Port F (PF7..PF0) 2514PS–AVR–07/06 Digital supply voltage. Ground. Port 8-bit bi-directional I/O port with internal pull-up resistors (selected ...
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Port G (PG4..PG0) RESET XTAL1 XTAL2 AVCC AREF LCDCAP ATmega169/V 6 buffers have symmetrical drive characteristics with both high sink and source capability. As inputs, Port F pins that are externally pulled low will source current if the pull-up resistors ...
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Register Summary Address Name Bit 7 (0xFF) Reserved – (0xFE) LCDDR18 – (0xFD) LCDDR17 SEG323 (0xFC) LCDDR16 SEG315 (0xFB) LCDDR15 SEG307 (0xFA) Reserved – (0xF9) LCDDR13 – (0xF8) LCDDR12 SEG223 (0xF7) LCDDR11 SEG215 (0xF6) LCDDR10 SEG207 (0xF5) Reserved – (0xF4) ...
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Address Name Bit 7 (0xBF) Reserved – (0xBE) Reserved – (0xBD) Reserved – (0xBC) Reserved – (0xBB) Reserved – (0xBA) USIDR (0xB9) USISR USISIF (0xB8) USICR USISIE (0xB7) Reserved – (0xB6) ASSR – (0xB5) Reserved – (0xB4) Reserved – (0xB3) ...
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Address Name Bit 7 (0x7D) Reserved – (0x7C) ADMUX REFS1 (0x7B) ADCSRB – (0x7A) ADCSRA ADEN (0x79) ADCH (0x78) ADCL (0x77) Reserved – (0x76) Reserved – (0x75) Reserved – (0x74) Reserved – (0x73) Reserved – (0x72) Reserved – (0x71) Reserved ...
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Address Name Bit 7 0x1B (0x3B) Reserved – 0x1A (0x3A) Reserved – 0x19 (0x39) Reserved – 0x18 (0x38) Reserved – 0x17 (0x37) TIFR2 – 0x16 (0x36) TIFR1 – 0x15 (0x35) TIFR0 – 0x14 (0x34) PORTG – 0x13 (0x33) DDRG – ...
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Instruction Set Summary Mnemonics Operands ARITHMETIC AND LOGIC INSTRUCTIONS ADD Rd, Rr Add two Registers ADC Rd, Rr Add with Carry two Registers ADIW Rdl,K Add Immediate to Word SUB Rd, Rr Subtract two Registers SUBI Rd, K Subtract Constant ...
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Mnemonics Operands BRIE k Branch if Interrupt Enabled BRID k Branch if Interrupt Disabled BIT AND BIT-TEST INSTRUCTIONS SBI P,b Set Bit in I/O Register CBI P,b Clear Bit in I/O Register LSL Rd Logical Shift Left LSR Rd Logical ...
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Mnemonics Operands POP Rd Pop Register from Stack MCU CONTROL INSTRUCTIONS NOP No Operation SLEEP Sleep WDR Watchdog Reset BREAK Break 2514PS–AVR–07/06 Description Rd ← STACK (see specific descr. for Sleep function) (see specific descr. for WDR/timer) For On-chip Debug ...
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... Thin (1.0 mm) Plastic Gull Wing Quad Flat Package (TQFP) 64M1 64-pad 1.0 mm body, lead pitch 0.50 mm, Quad Flat No-Lead/Micro Lead Frame Package (QFN/MLF) ATmega169/V 14 Ordering Code Package ATmega169V-8AI 64A (2) ATmega169V-8AU 64A ATmega169V-8MI 64M1 (2) ATmega169V-8MU 64M1 ATmega169-16AI 64A (2) ATmega169-16AU 64A ATmega169-16MI 64M1 (2) ATmega169-16MU 64M1 Package Type (1) Operation Range Industrial 0° ...
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Packaging Information 64A PIN 0˚~7˚ L Notes: 1. This package conforms to JEDEC reference MS-026, Variation AEB. 2. Dimensions D1 and E1 do not include mold protrusion. Allowable protrusion is 0.25 mm per side. Dimensions D1 and ...
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D Marked Pin TOP VIEW BOTTOM VIEW Note: 1. JEDEC Standard MO-220, (SAW Singulation) Fig. 1, VMMD. 2. Dimension and tolerance conform to ASMEY14.5M-1994. 2325 Orchard Parkway San Jose, CA 95131 ...
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Errata ATmega169 Rev E ATmega169 Rev D 2514PS–AVR–07/06 • Interrupts may be lost when writing the timer registers in the asynchronous timer 1. Interrupts may be lost when writing the timer registers in the asynchronous timer If one of the ...
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ATmega169 Rev C ATmega169/V 18 • Interrupts may be lost when writing the timer registers in the asynchronous timer • High Current Consumption In Power Down when JTAGEN is Programmed • LCD Contrast Control • Some Data Combinations Can Result ...
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ATmega169 Rev B 2514PS–AVR–07/06 Problem Fix / Workaround – If ATmega169 is the only device in the scan chain, the problem is not visible. – Select the Device ID Register of the ATmega169 by issuing the IDCODE instruction or by ...
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ATmega169/V 20 Alternative Problem Fix/Workaround Adding a pull-down on XTAL1 will start the Oscillator. 4. USART Writing TXEN to zero during transmission causes the transmission to suddenly stop. The datasheet description tells that the transmission should complete before stop- ping ...
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Datasheet Revision History Changes from Rev. 2514O-03/06 to Rev. 2514P-07/06 Changes from Rev. 2514N-03/06 to Rev. 2514O-03/06 Changes from Rev. 2514M-05/05 to Rev. 2514N-03/06 Changes from Rev. 2514L-03/05 to Rev. 2514M-05/05 Changes from Rev. 2514K-04/04 to Rev. 2514L-03/05 2514PS–AVR–07/06 Please ...
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... Updated “Electrical Characteristics” on page 297. 8. Updated “ATmega169 Typical Characteristics” on page 304. 9. Updated “Ordering Information” on page 14. ATmega169L replaced by ATmega169V and ATmega169. 1. Updated “Calibrated Internal RC Oscillator” on page 27 1. Removed “Advance Information” from the datasheet. 2. Removed AGND from Figure 2 on page 3 and added “System Clock Prescaler” ...
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Changes from Rev. 2514G-04/03 to Rev. 2514H-05/03 Changes from Rev. 2514F-04/03 to Rev. 2514G-04/03 Changes from Rev. 2514E-02/03 to Rev. 2514F-04/03 Changes from Rev. 2514D-01/03 to Rev. 2514E-02/03 2514PS–AVR–07/06 1. Updated typo in Figure 148, Figure 168, and Figure 195. ...
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Changes from Rev. 2514C-11/02 to Rev. 2514D-01/03 ATmega169 Updated the “Ordering Information” on page 14 to include the new speed grade for ATmega169L and the new 16 MHz ATmega169. 1. Added TCK frequency limit in “Programming via the ...
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Changes from Rev. 2514B-09/02 to Rev. 2514C-11/02 Changes from Rev. 2514A-08/02 to Rev. 2514B-09/02 2514PS–AVR–07/06 18. Added information about PWM symmetry for Timer0 and Timer2. 19. Corrected the contents of DIDR0 and DIDR1. 20. Made all bit names in the ...
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... Atmel does not make any commitment to update the information contained herein. Atmel’s products are not intended, authorized, or warranted for use as components in applications intended to support or sustain life. © 2006 Atmel Corporation. All rights reserved. Atmel istered trademarks of Atmel Corporation or its subsidiaries. Other terms and product names may be trademarks of others. Atmel Operations Memory ...