atmega323l ATMEL Corporation, atmega323l Datasheet - Page 30

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atmega323l

Manufacturer Part Number
atmega323l
Description
Atmega323 8-bit Avr Microcontroller With 32k Bytes Of In-system Programmable Flash
Manufacturer
ATMEL Corporation
Datasheet
Watchdog Reset
MCU Control and Status
Register – MCUCSR
30
ATmega323(L)
Figure 28. Brown-out Reset During Operation
The hysteresis on V
When the Watchdog times out, it will generate a short reset pulse of 1 CK cycle dura-
tion. On the falling edge of this pulse, the delay timer starts counting the Time-out Period
t
Figure 29. Watchdog Reset During Operation
The MCU Control and Status Register contains control bits for general MCU functions,
and provides information on which reset source caused an MCU Reset.
• Bit 7 – JTD: JTAG Interface Disable
When this bit is cleared (zero), the JTAG interface is enabled if the JTAGEN Fuse is
programmed. If this bit is set (one), the JTAG interface is disabled. To avoid uninten-
tional disabling of the JTAG interface, the user software must write this bit as one twice
within four cycles to set the bit.
If the JTAG interface is left unconnected to other JTAG circuitry, the JTD bit should be
set to one. The reason for this is to avoid static current at the TDO pin in the JTAG
interface.
TOUT
Bit
$34 ($54)
Read/Write
Initial Value
. Refer to page 64 for details on operation of the Watchdog Timer.
INTERNAL
TIME-OUT
RESET
RESET
JTD
R/W
V
7
0
CC
BOT
ISC2
R/W
6
0
: V
BOT+
= V
R
5
0
V
BOT
CK
BOT-
JTRF
+ 25 mV, V
R/W
4
WDRF
R/W
3
BOT-
See Bit Description
= V
BORF
R/W
2
BOT
V
t
TOUT
BOT+
- 25 mV
EXTRF
R/W
1
PORF
R/W
0
1457G–AVR–09/03
MCUCSR

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