atmega644v ATMEL Corporation, atmega644v Datasheet
atmega644v
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atmega644v Summary of contents
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... I/O and Packages – 32 Programmable I/O Lines – 40-pin PDIP, 44-lead TQFP, and 44-pad QFN/MLF • Speed Grades – ATmega644V 4MHz @ 1.8 - 5.5V 10MHz @ 2.7 - 5.5V – ATmega644 10MHz @ 2.7 - 5.5V 20MHz @ 4.5 - 5.5V • Power Consumption at 1 MHz, 3V, 25°C for – Active: 240 µA @ 1.8V, 1MHz – Power-down Mode: 0.1 µA @ 1.8V Notes: 1 ...
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Pin Configurations Figure 1-1. Note: ATmega644 2 Pinout ATmega644 (PCINT8/XCK0/T0) PB0 (PCINT9/CLKO/T1) PB1 (PCINT10/INT2/AIN0) PB2 (PCINT11/OC0A/AIN1) PB3 (PCINT12/OC0B/SS) PB4 (PCINT13/MOSI) PB5 (PCINT14/MISO) PB6 (PCINT15/SCK) PB7 RESET VCC GND XTAL2 XTAL1 (PCINT24/RXD0) PD0 (PCINT25/TXD0) PD1 (PCINT26/INT0) PD2 (PCINT27/INT1) PD3 (PCINT28/OC1B) ...
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Disclaimer Typical values contained in this datasheet are based on simulations and characterization of other AVR microcontrollers manufactured on the same process technology. Min and Max values will be available after the device is characterized. 2. Overview The ATmega644 ...
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The AVR core combines a rich instruction set with 32 general purpose working registers. All the 32 registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two independent registers to be accessed in one single instruction executed in ...
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As inputs, Port A pins that are externally pulled low will source current if the pull-up resistors are activated. The Port A pins are tri-stated when a reset condition becomes active, even if the clock is not ...
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... CC 2.2.11 AREF This is the analog reference pin for the Analog-to-digital Converter. 3. Resources A comprehensive set of development tools, application notes and datasheetsare available for download on http://www.atmel.com/avr. ATmega644 6 , even if the ADC is not used. If the ADC is used, it should be connected CC 2593MS–AVR–08/07 ...
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Register Summary Address Name Bit 7 (0xFF) Reserved - (0xFE) Reserved - (0xFD) Reserved - (0xFC) Reserved - (0xFB) Reserved - (0xFA) Reserved - (0xF9) Reserved - (0xF8) Reserved - (0xF7) Reserved - (0xF6) Reserved - (0xF5) Reserved - ...
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Address Name Bit 7 (0xBF) Reserved - (0xBE) Reserved - (0xBD) TWAMR TWAM6 (0xBC) TWCR TWINT (0xBB) TWDR (0xBA) TWAR TWA6 (0xB9) TWSR TWS7 (0xB8) TWBR (0xB7) Reserved - (0xB6) ASSR - (0xB5) Reserved - (0xB4) OCR2B (0xB3) OCR2A (0xB2) ...
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Address Name Bit 7 (0x7D) Reserved - (0x7C) ADMUX REFS1 (0x7B) ADCSRB - (0x7A) ADCSRA ADEN (0x79) ADCH (0x78) ADCL (0x77) Reserved - (0x76) Reserved - (0x75) Reserved - (0x74) Reserved - (0x73) PCMSK3 PCINT31 (0x72) Reserved - (0x71) Reserved ...
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Address Name Bit 7 0x1B (0x3B) PCIFR - 0x1A (0x3A) Reserved - 0x19 (0x39) Reserved - 0x18 (0x38) Reserved - 0x17 (0x37) TIFR2 - 0x16 (0x36) TIFR1 - 0x15 (0x35) TIFR0 - 0x14 (0x34) Reserved - 0x13 (0x33) Reserved - ...
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Instruction Set Summary Mnemonics Operands ARITHMETIC AND LOGIC INSTRUCTIONS ADD Rd, Rr Add two Registers ADC Rd, Rr Add with Carry two Registers ADIW Rdl,K Add Immediate to Word SUB Rd, Rr Subtract two Registers SUBI Rd, K Subtract ...
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Mnemonics Operands BRVC k Branch if Overflow Flag is Cleared BRIE k Branch if Interrupt Enabled BRID k Branch if Interrupt Disabled BIT AND BIT-TEST INSTRUCTIONS SBI P,b Set Bit in I/O Register CBI P,b Clear Bit in I/O Register ...
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Mnemonics Operands OUT P, Rr Out Port PUSH Rr Push Register on Stack POP Rd Pop Register from Stack MCU CONTROL INSTRUCTIONS NOP No Operation SLEEP Sleep WDR Watchdog Reset BREAK Break 2593MS–AVR–08/07 Description P ← Rr STACK ← Rr ...
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... Wide, Plastic Dual Inline Package (PDIP) 44M1 44-pad 1.0 mm body, lead pitch 0.50 mm, Quad Flat No-Lead/Micro Lead Frame Package (QFN/MLF) ATmega644 14 (2) Ordering Code Package ATmega644V-10AU 44A ATmega644V-10PU 40P6 ATmega644V-10MU 44M1 ATmega644-20AU 44A ATmega644-20PU 40P6 ATmega644-20MU 44M1 318. Package Type (1) Operational Range ...
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Packaging Information 7.1 44A PIN 0˚~7˚ L Notes: 1. This package conforms to JEDEC reference MS-026, Variation ACB. 2. Dimensions D1 and E1 do not include mold protrusion. Allowable protrusion is 0.25 mm per side. Dimensions ...
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A SEATING PLANE Notes: 1. This package conforms to JEDEC reference MS-011, Variation AC. 2. Dimensions D and E1 do not include mold Flash or Protrusion. Mold Flash or Protrusion shall not exceed 0.25 mm ...
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D Marked Pin TOP VIEW BOTTOM VIEW Note: JEDEC Standard MO-220, Fig. 1 (SAW Singulation) VKKD-3. 2325 Orchard Parkway San Jose, CA 95131 R 2593MS–AVR–08/07 E Pin #1 Corner Pin ...
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Errata 8.1 Rev. C • Inaccurate ADC conversion in differential mode with 200x gain 1. Inaccurate ADC conversion in differential mode with 200x gain With AVCC < 3.6V, random conversions will be inaccurate. Typical absolute accuracymay reach 64 LSB. ...
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Datasheet Revision History Please note that the referring page numbers in this section are referred to this document. The referring revision in this section are referring to the document revision. 9.1 Rev. 2593M - 08/ ...
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Rev. 2593I - 08/ 9.6 Rev. 2593H - 07/ 9.7 Rev. 2593G - 06/ 9.8 Rev. 2593F - 04/ 9.9 Rev. 2593E - 04/06 1. 9.10 ...
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Rev. 2593B - 03/ 10. 11. 12. 13. 14. 15. 16. 17. 18. 9.13 Rev. 2593A-06/05 1. Initial revision. 2593MS–AVR–08/07 Updated code example in ”Interrupt Vectors in ...
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