at91sam9g15-cu ATMEL Corporation, at91sam9g15-cu Datasheet - Page 33
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at91sam9g15-cu
Manufacturer Part Number
at91sam9g15-cu
Description
At91sam Arm-based Embedded Mpu
Manufacturer
ATMEL Corporation
Datasheet
1.AT91SAM9G15-CU.pdf
(45 pages)
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10. Embedded Peripherals
10.1
10.2
10.3
11052AS–ATARM–27-Jul-11
Serial Peripheral Interface (SPI)
Two Wire Interface (TWI)
Universal Synchronous/Asynchronous Receiver Transmitters (USART)
• Two SPIs
• Supports communication with serial external devices
• Master or slave serial peripheral bus interface
• Very fast transfers supported
• Two TWIs
• Compatibility with standard two-wire serial memory
• One, two or three bytes for slave address
• Sequential read/write operations
• Supports either master or slave modes
• Compatible with Standard Two-wire Serial Memories
• Master, Multi-master and Slave Mode Operation
• Bit Rate: Up to 400 Kbits
• General Call Supported in Slave mode
• Three USARTs
• Manchester Encoding/Decoding
• Programmable Baud Rate Generator
• 5- to 9-bit full-duplex synchronous or asynchronous serial communications
– Four chip selects with external decoder support allow communication with up to 15
– Serial memories, such as DataFlash and 3-wire EEPROMs
– Serial peripherals, such as ADCs, DACs, LCD Controllers, CAN Controllers and
– External co-processors
– 8- to 16-bit programmable data length per chip select
– Programmable phase and polarity per chip select
– Programmable transfer delays between consecutive transfers and between clock
– Programmable delay between consecutive transfers
– Selectable mode fault detection
– Transfers with baud rates up to MCK
– The chip select line may be left active to speed up transfers on the same device
– 1, 1.5 or 2 stop bits in Asynchronous Mode or 1 or 2 stop bits in Synchronous Mode
– Parity generation and error detection
– Framing error detection, overrun error detection
peripherals
Sensors
and data per chip select
SAM9G15
33