lpc11c12 NXP Semiconductors, lpc11c12 Datasheet - Page 36

• Manufacturer Part Number: lpc11c12
• Description: 32-bit Cortex-m0 Microcontroller; 16/32 Flash, Sram; C_can
• Manufacturer: NXP Semiconductors

NXP Semiconductors
LPC11C12_C14_0
Preliminary data sheet
10.4 I/O pins
10.5 I
Table 12.
T
[1]
Table 13.
T
[1]
[2]
[3]
[4]
[5]
Symbol
t
t
Symbol
f
t
t
t
t
t
2
r
f
amb
amb
SCL
f
LOW
HIGH
HD;DAT
SU;DAT
C-bus
Applies to standard port pins and RESET pin.
See the I
Parameters are valid over operating temperature range unless otherwise specified.
t
and the acknowledge.
A device must internally provide a hold time of at least 300 ns for the SDA signal (with respect to the
V
C
HD;DAT
=
=
IH
b
−
−
= total capacitance of one bus line in pF.
(min) of the SCL signal) to bridge the undefined region of the falling edge of SCL.
40
40
is the data hold time that is measured from the falling edge of SCL; applies to data in transmission
°
°
Dynamic characteristic: I/O pins
Dynamic characteristic: I
C to +85
C to +85
2
C-bus specification UM10204 for details.
Parameter
SCL clock
frequency
fall time
LOW period of
the SCL clock
HIGH period of
the SCL clock
data hold time
data set-up
time
All information provided in this document is subject to legal disclaimers.
Parameter
rise time
fall time
°
°
C; 1.8 V
C.
[2]
Rev. 00.05 — 6 May 2010
[4][5][6][7]
[3][4][8]
[9][10]
≤
V
DD
Conditions
pin
configured as
output
pin
configured as
output
≤
2
C-bus pins
3.6 V.
Conditions
Standard-mode
Fast-mode
Fast-mode Plus
of both SDA and
SCL signals
Standard-mode
Fast-mode
Fast-mode Plus
Standard-mode
Fast-mode
Fast-mode Plus
Standard-mode
Fast-mode
Fast-mode Plus
Standard-mode
Fast-mode
Fast-mode Plus
Standard-mode
Fast-mode
Fast-mode Plus
[1]
[1]
Min
3.0
2.5
Min
0
0
0
-
20 + 0.1 × C
-
4.7
1.3
0.5
4.0
0.6
0.26
0
0
0
250
50
100
LPC11C12/C14
Typ
-
-
b
© NXP B.V. 2010. All rights reserved.
Max
100
400
1
300
300
120
-
-
-
-
-
-
-
-
-
-
-
-
Max
5.0
5.0
Unit
kHz
kHz
MHz
ns
ns
ns
μs
μs
μs
μs
μs
μs
μs
μs
μs
ns
ns
ns
Unit
ns
ns
36 of 49