MC74ACT564DWR2 ON Semiconductor, MC74ACT564DWR2 Datasheet - Page 2

no-image

MC74ACT564DWR2

Manufacturer Part Number
MC74ACT564DWR2
Description
IC FLIP FLOP OCTAL D 3ST 20-SOIC
Manufacturer
ON Semiconductor
Series
74ACTr
Type
D-Type Busr
Datasheet

Specifications of MC74ACT564DWR2

Function
Standard
Output Type
Tri-State Inverted
Number Of Elements
1
Number Of Bits Per Element
8
Frequency - Clock
85MHz
Delay Time - Propagation
2ns
Trigger Type
Positive Edge
Current - Output High, Low
24mA, 24mA
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
20-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
CP
OE
FUNCTIONAL DESCRIPTION
flip−flops with individual D−type inputs and 3−state
complementary outputs. The buffered clock and buffered
Output Enable are common to all flip−flops. The eight
flip−flops will store the state of their individual D inputs that
The MC74ACT564 consists of eight edge−triggered
O
Q
C
0
D
D
0
O
Q
C
1
logic operations and should not be used to estimate propagation delays.
Please note that this diagram is provided only for the understanding of
FUNCTION TABLE
H =
L
X =
Z =
NC =
OE
H
H
H
H
D
L
L
L
L
D
1
=
=
Inputs
HIGH Voltage Level
LOW Voltage Level
Immaterial
High Impedance
LOW−to−HIGH Transition
No Change
CP
H
H
H
H
O
C
Q
2
D
H
H
H
H
L
L
L
L
D
Figure 3. Logic Diagram
D
2
http://onsemi.com
Internal
MC74ACT564
NC
NC
NC
NC
Q
H
H
L
L
O
C
Q
3
2
Outputs
D
D
3
meet the setup and hold times requirements on the
LOW−to−HIGH Clock (CP) transition. With the Output
Enable (OE) LOW, the contents of the eight flip−flops are
available at the outputs. When OE is HIGH, the outputs go
to the high impedance state. Operation of the OE input does
not affect the state of the flip−flops.
NC
NC
O
H
Z
Z
Z
Z
L
O
Q
C
4
Hold
Hold
Load
Load
Data Available
Data Available
No Change in Data
No Change in Data
D
Function
D
4
O
Q
C
5
D
D
5
O
C
Q
6
D
D
6
O
Q
C
7
D
D
7

Related parts for MC74ACT564DWR2