mb95f108amwpfv Fujitsu Microelectronics, Inc., mb95f108amwpfv Datasheet - Page 24

• Manufacturer Part Number: mb95f108amwpfv
• Description: 8-bit Proprietary Microcontrollers Cmos 2 F2mc-8fx Mb95100am Series
• Manufacturer: Fujitsu Microelectronics, Inc.

24
MB95100AM Series
• Rule for Conversion of Actual Addresses in the General-purpose Register Area
The RP indicates the address of the register bank currently being used. The relationship between the content
of RP and the real address conforms to the conversion rule illustrated below:
The DP specifies the area for mapping instructions (16 different instructions such as MOV A, dir) using direct
addresses to 0080
The CCR consists of the bits indicating arithmetic operation results or transfer data contents and the bits that
control CPU operations at interrupt.
Direct bank pointer (DP2 to DP0)
N flag
Z flag
V flag
C flag
H flag
I flag
IL1, IL0 : Indicates the level of the interrupt currently enabled. Processes an interrupt only if its request level
Generated address
XXX
IL1
0
0
1
1
B
000
:
:
:
:
(no effect to mapping)
: Set to “1” when a carry or a borrow from bit 3 to bit 4 occurs as a result of an arithmetic operation.
: Interrupt is enabled when this flag is set to “1”. Interrupt is disabled when this flag is set to “0”.
Set to “1” if the MSB is set to “1” as the result of an arithmetic operation. Cleared to “0” when the
bit is set to “0”.
Set to “1” when an arithmetic operation results in “0”. Cleared to “0” otherwise.
Set to “1” if the complement on 2 overflows as a result of an arithmetic operation. Cleared to “0”
otherwise.
Set to “1” when a carry or a borrow from bit 7 occurs as a result of an arithmetic operation. Cleared
to “0” otherwise. Set to the shift-out value in the case of a shift instruction.
Cleared to “0” otherwise. This flag is for decimal adjustment instructions.
The flag is set to “0” when reset.
is higher than the value indicated by this bit.
B
(initial value)
001
010
011
100
101
110
111
H
B
B
B
B
B
B
B
to 00FF
"0"
A15 A14 A13 A12 A11 A10
IL0
0
1
0
1
H
.
"0"
"0"
"0"
Specified address area
"0"
0000
0080
Interrupt level
"0"
H
H
"0"
A9
to 007F
to 00FF
0
1
2
3
"1"
A8
H
H
R4
A7
R3
A6
RP upper
R2
A5
0000
0080
R1
A4
H
H
to 007F
to 00FF
Low = no interruption
R0
A3
0100
0180
0200
0280
0300
0380
0400
Mapping area
OP code lower
A2
b2
H
H
H
H
H
H
H
H
H
Priority
to 01FF
to 02FF
to 03FF
(without mapping)
(without mapping)
to 017F
to 027F
to 037F
to 047F
High
b1
A1
A0
b0
H
H
H
H
H
H
H