c8051f544 Silicon Laboratories, c8051f544 Datasheet - Page 110
c8051f544
Manufacturer Part Number
c8051f544
Description
Mixed Signal Isp Flash Mcu Family
Manufacturer
Silicon Laboratories
Datasheet
1.C8051F544.pdf
(274 pages)
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C8051F54x
SFR Definition 13.2. IP: Interrupt Priority
SFR Address = 0xB8; Bit-Addressable; SFR Page = All Pages
110
Name
Reset
Bit
Type
7
6
5
4
3
2
1
0
Bit
Unused
PSPI0
Name
PT2
PS0
PT1
PX1
PT0
PX0
R
7
1
Read = 1b, Write = Don't Care.
Serial Peripheral Interface (SPI0) Interrupt Priority Control.
This bit sets the priority of the SPI0 interrupt.
0: SPI0 interrupt set to low priority level.
1: SPI0 interrupt set to high priority level.
Timer 2 Interrupt Priority Control.
This bit sets the priority of the Timer 2 interrupt.
0: Timer 2 interrupt set to low priority level.
1: Timer 2 interrupt set to high priority level.
UART0 Interrupt Priority Control.
This bit sets the priority of the UART0 interrupt.
0: UART0 interrupt set to low priority level.
1: UART0 interrupt set to high priority level.
Timer 1 Interrupt Priority Control.
This bit sets the priority of the Timer 1 interrupt.
0: Timer 1 interrupt set to low priority level.
1: Timer 1 interrupt set to high priority level.
External Interrupt 1 Priority Control.
This bit sets the priority of the External Interrupt 1 interrupt.
0: External Interrupt 1 set to low priority level.
1: External Interrupt 1 set to high priority level.
Timer 0 Interrupt Priority Control.
This bit sets the priority of the Timer 0 interrupt.
0: Timer 0 interrupt set to low priority level.
1: Timer 0 interrupt set to high priority level.
External Interrupt 0 Priority Control.
This bit sets the priority of the External Interrupt 0 interrupt.
0: External Interrupt 0 set to low priority level.
1: External Interrupt 0 set to high priority level.
PSPI0
R/W
6
0
R/W
PT2
5
0
R/W
PS0
Rev. 1.0
4
0
Function
R/W
PT1
3
0
PX1
R/W
2
0
R/W
PT0
1
0
R/W
PX0
0
0
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