cop87l88kg National Semiconductor Corporation, cop87l88kg Datasheet
cop87l88kg
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cop87l88kg Summary of contents
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... COP87L88KG 8-Bit One-Time Programmable (OTP) Microcontroller with UART and Three Multi-Function Timers General Description The COP87L88KG OTP microcontroller is a member of the COP8 feature family using an 8-bit core architecture pin and software compatible to the mask ROM COP888KG product family Key Features ...
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... High throughput is achieved with an efficient regular instruction set operating at a maximum rate per instruction Dual-In-Line Package TL DD12864 – 2 Order Number COP87L88KGN-XE See NS Package Number N40A FIGURE 2 Connection Diagrams 2 TL DD12864 – DD12864 – ...
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Connection Diagrams (Continued) Port Type WDOUT ...
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Absolute Maximum Ratings If Military Aerospace specified devices are required please contact the National Semiconductor Sales Office Distributors for availability and specifications Supply Voltage ( Voltage at Any Pin Total Current into V Pin (Source ...
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AC Electrical Characteristics COP888KG Parameter Instruction Cycle Time ( Crystal Resonator R C Oscillator Inputs t SETUP t HOLD Output Propagation Delay t t PD1 PD0 SO SK All Others MICROWIRE Setup Time (t ) (Note 5) UWS ...
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Comparators AC and DC Characteristics Parameter Input Offset Voltage Input Common Mode Voltage Range Voltage Gain Low Level Output Current High Level Output Current DC Supply Current per Comparator (When Enabled) Response Time http www national com ...
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Pin Descriptions V and GND are the power supply pins All V CC pins must be connected CKI is the clock input This can come from generat- ed oscillator or a crystal oscillator (in conjunction with CKO) ...
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Pin Descriptions (Continued) Note that the chip will be placed in the HALT mode by writ- ing a ‘‘1’’ to bit 7 of the Port G Data Register Similarly the chip will be placed in the IDLE mode by writing ...
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Data Memory Segment RAM Extension Data memory address 0FF is used as a memory mapped location for the Data Segment Address Register (S) The data store memory is either addressed directly by a single byte address within the instruction or ...
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Reset The RESET input when pulled low initializes the microcon- troller Initialization will occur whenever the RESET input is pulled low Upon initialization the data and configuration registers for ports L G and C are cleared resulting in these Ports ...
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Control Registers CNTRL Register (Address X 00EE) The Timer1 (T1) and MICROWIRE PLUS control register contains the following bits SL1 SL0 Select the MICROWIRE PLUS clock divide ( IEDG External interrupt ...
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Timers The device contains a very versatile set of timers ( T3) All timers and associated autoreload capture regis- ters power up containing random data TIMER T0 (IDLE TIMER) The device supports applications that require maintaining real time ...
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Timers (Continued) Figure 9 shows a block diagram of the timer in External Event Counter mode Note The PWM output is not available in this mode since the TxA pin is being used as the counter input clock FIGURE 9 ...
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Timers (Continued) The timer mode control bits (TxC3 TxC2 and TxC1) are detailed below TxC3 TxC2 TxC1 ...
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Power Save Modes (Continued) The device has two mask options associated with the HALT mode The first mask option enables the HALT mode fea- ture while the second mask option disables the HALT mode With the HALT mode enable mask ...
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Multi-Input Wakeup (Continued) The Multi-Input Wakeup feature utilizes the L Port The user selects which particular L port bit (or combination of L Port bits) will cause the device to exit the HALT or IDLE modes The selection is done ...
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UART The device contains a full-duplex software programmable UART The UART (Figure 12) consists of a transmit shift register a receive shift register and seven addressable reg- isters as follows a transmit buffer register (TBUF) a receiv- er buffer register ...
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UART (Continued) UART CONTROL AND STATUS REGISTERS The operation of the UART is programmed through three registers ENU ENUR and ENUI The function of the individ- ual bits in these registers is as follows ENU-UART Control and Status Register (Address ...
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UART (Continued) ETDX TDX (UART Transmit Pin) is the alternate function assigned to Port L pin selected by setting ETDX bit To simulate line break generation software should reset ETDX bit and output logic zero to TDX ...
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UART Operation (Continued) UART INTERRUPTS The UART is capable of generating interrupts Interrupts are generated on Receive Buffer Full and Transmit Buffer Emp- ty Both interrupts have individual interrupt vectors Two bytes of program memory space are reserved for each ...
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Baud Clock Generation (Continued) FIGURE 14 UART BAUD Clock Generation FIGURE 15 UART BAUD Clock Divisor Registers 21 TL DD12864 – DD12864 – 17 http www national com ...
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Baud Clock Generation TABLE III Baud Rate Divisors (1 8432 MHz Prescaler Output) Baud Baud Rate b Rate Divisor 110 (110 03) 1046 134 5 (134 58) 855 150 767 300 383 600 191 1200 95 1800 63 2400 47 ...
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Baud Clock Generation (Continued) Where BR is the Baud Rate Fc is the CKI frequency N is the Baud Rate Divisor (Table IV the Prescaler Divide Factor selected by the value in the Prescaler Select Register (Table III) ...
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Comparators (Continued) CMPSL REGISTER (ADDRESS X’00B7) The CMPSL register contains the following bits CMP1EN Enable comparator 1 CMP1RD Comparator 1 result (this is a read only bit which will read the comparator is not enabled) CMP10E Selects ...
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Interrupts (Continued this time since GIE 0 other maskable interrupts are disabled The user is now free to do whatever context switching is required by saving the context of the machine in the stack with PUSH instructions The ...
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Interrupts (Continued) When an ST occurs the user can re-initialize the stack pointer and do a recovery procedure (similar to reset but not necessarily containing all of the same initialization pro- cedures) before restarting The occurrence ...
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WATCHDOG Operation (Continued) WATCHDOG AND CLOCK MONITOR SUMMARY The following salient points regarding the WATCHDOG and CLOCK MONITOR should be noted Both the WATCHDOG and CLOCK MONITOR detector circuits are inhibited during RESET Following RESET the WATCHDOG and ...
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Detection of Illegal Conditions The device can detect various illegal conditions resulting from coding errors transient noise power supply voltage drops runaway programs etc Reading of undefined ROM gets zeros The opcode for soft- ware interrupt is zero If the ...
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MICROWIRE PLUS (Continued) MICROWIRE PLUS OPERATION Setting the BUSY bit in the PSW register causes the MI- CROWIRE PLUS to start shifting the data It gets reset when eight data bits have been shifted The user may reset the BUSY ...
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Memory Map All RAM ports and registers (except A and PC) are mapped into data memory address space Address Contents S ADD REG 0000 to 006F On-Chip RAM bytes (112 bytes) 0070 to 007F Unused RAM Address Space (Reads As ...
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Addressing Modes There are ten addressing modes six for operand address- ing and four for transfer of control OPERAND ADDRESSING MODES Register Indirect This is the ‘‘normal’’ addressing mode The operand is the data memory addressed by the B pointer ...
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Instruction Set (Continued) INSTRUCTION SET ADD A Meml ADD ADC A Meml ADD with Carry SUBC A Meml Subtract with Carry AND A Meml Logical AND ANDSZ A Imm Logical AND Immed Skip if Zero OR A Meml Logical OR ...
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Instruction Execution Time Most instructions are single byte (with immediate addressing mode instructions taking two bytes) Most single byte instructions take one cycle time to execute Skipped instructions require x number of cycles to be skipped where x equals the ...
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http www national com 34 ...
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Mask Options The mask programmable options are shown below The op- tions are programmed at the same time as the ROM pattern submission OPTION 1 CLOCK CONFIGURATION e 1 Crystal Oscillator (CKI 10) G7 (CKO) is clock generator output to ...
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Development Support (Continued) IceMASTER (IM) IN-CIRCUIT EMULATION The iceMASTER IM-COP8 400 is a full feature PC based in-circuit emulation tool developed and marketed by Meta- Link Corporation to support the whole COP8 family of prod- ucts National is a resale ...
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Development Support (Continued) IceMASTER DEBUG MODULE (DM) The iceMASTER Debug Module based combination in-circuit emulation tool and COP8 based OTP EPROM pro- gramming tool developed and marketed by MetaLink Corpo- ration to support the whole COP8 family ...
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Development Support (Continued) iceMASTER EVALUATION PROGRAMMING UNIT (EPU) The iceMASTER EPU-COP888GG based in-circuit simulation tool to support the feature family COP8 products See Figure 21 for configuration The simulation capability is a very low cost means of ...
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Development Support (Continued) COP8 ASSEMBLER LINKER SOFTWARE DEVELOPMENT TOOL KIT National Semiconductor offers a relocateable COP8 macro cross assembler linker librarian and utility software devel- opment tool kit Features are summarized as follows Basic and Feature Family instruction set ...
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Development Support (Continued) AVAILABLE LITERATURE For more information please see the COP8 Basic Family User’s Manual Literature Number 620895 COP8 Feature Family User’s Manual Literature Number 620897 and Na- tional’s Family of 8-bit Microcontrollers COP8 Selection Guide Literature Number 630009 ...
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... Physical Dimensions inches (millimeters) unless otherwise noted Molded Dual-In-Line Package (N) Order Number COP87L88KGN-XE NS Package Number N40A 41 http www national com ...
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... National does not assume any responsibility for use of any circuitry described no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications Plastic Leaded Chip Carrier (V) Order Number COP87L88KGV-XE NS Package Number V44A 2 A critical component is any component of a life ...