cop888fh National Semiconductor Corporation, cop888fh Datasheet - Page 9

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cop888fh

Manufacturer Part Number
cop888fh
Description
8-bit Cmos Rom Based Microcontrollers With 12k Memory, Comparators, Usart And Hardware Multiply/divide
Manufacturer
National Semiconductor Corporation
Datasheet
Maximum Input Current
without Latchup (Notes 11, 12)
RAM Retention Voltage, V
Input Capacitance
Load Capacitance on D2
Instruction Cycle Time (t
CKI Clock Duty Cycle (Note 12)
Inputs
Output Propagation Delay
MICROWIRE Setup Time (t
MICROWIRE Hold Time (t
MICROWIRE Output Propagation Delay (t
Input Pulse Width (Note 13)
Reset Pulse Width
DC Electrical Characteristics COP88xFH:
AC Electrical Characteristics COP88xFH:
Note 8: Maximum rate of voltage change must be less than 0.5V/ms.
Note 9: Supply current is measured after running 2000 cycles with a square wave CKI input, CKO open, inputs at rails and outputs open.
Note 10: The HALT mode will stop CKI from oscillating in the RC and the Crystal configurations. Measurement of I
sinking current; with L, C, and G0–G5 programmed as low outputs and not driving a load; all outputs programmed low and not driving a load; all inputs tied to V
clock monitor and comparators disabled. Parameter refers to HALT mode entered via setting bit 7 of the G Port data register. Part will pull up CKI during HALT in crys-
tal clock mode.
Note 11: Pins G6 and RESET are designed with a high voltage input network. These pins allow input voltages greater than V
to V
(typical). These two pins will not latch up. The voltage at the pins must be limited to less than 14V. WARNING: Voltages in excess of 14V will cause damage to the
pins. This warning excludes ESD transients.
Note 12: Parameter characterized but not tested.
Note 13: t
−40˚C
−40˚C
Crystal Resonator or External
R/C Oscillator
Rise Time (Note 12)
Fall Time (Note 12)
t
t
t
SO, SK
All Others
Interrupt Input High Time
Interrupt Input Low Time
Timer 1, 2, 3 Input High Time
Timer 1, 2, 3 Input Low Time
SETUP
HOLD
PD1
CC
, t
when biased at voltages greater than V
PD0
c
T
T
= Instruction cycle time.
A
A
Parameter
+85˚C unless otherwise specified
+85˚C unless otherwise specified
Parameter
c
)
r
UWH
UWS
) (Note 12)
) (Note 12)
CC
(the pins do not have source current when biased at a voltage below V
Room Temp
500 ns Rise
and Fall Time (Min)
(Note 12)
(Note 12)
UPD
)
Conditions
2.5V
4.0V
2.5V
4.0V
f = Max
f = 10 MHz Ext Clock
f = 10 MHz Ext Clock
4.0V
2.5V
4.0V
2.5V
R
4.0V
2.5V
4.0V
2.5V
V
V
V
L
CC
CC
CC
= 2.2k, C
4.0V
4.0V
4.0V
V
V
V
V
V
V
V
V
V
V
V
V
Conditions
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
9
<
<
<
<
<
L
4.0V
5.5V
5.5V
5.5V
5.5V
5.5V
5.5V
4.0V
4.0V
4.0V
4.0V
4.0V
= 100 pF
(Continued)
Min
2
Min
200
500
150
2.5
1.0
7.5
3.0
45
60
20
56
1
1
1
1
1
DD
Typ
HALT is done with device neither sourcing or
CC
). The effective resistance to V
Typ
CC
and the pins will have sink current
±
1000
Max
100
7
Max
1.75
220
DC
DC
DC
DC
0.7
2.5
55
5
5
1
www.national.com
CC
Units
Units
is 750
mA
pF
pF
µs
µs
µs
µs
µs
µs
ns
ns
ns
ns
µs
µs
µs
µs
ns
ns
ns
µs
V
%
t
t
t
t
c
c
c
c
CC
;

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