cop8tab5 National Semiconductor Corporation, cop8tab5 Datasheet - Page 25

• Manufacturer Part Number: cop8tab5
• Description: 8-bit Cmos Rom Microcontroller With 2k Or 4k Memory
• Manufacturer: National Semiconductor Corporation

12.0 Power Save Modes
and LWKPND registers contain undefined values after reset,
so software should clear these bits after reset to ensure that
no spurious Wake-Up events or interrupts are left pending.
13.0 Interrupts
13.1 INTRODUCTION
The device supports eleven vectored interrupts. Interrupt
sources include Timer 1, Timer 2, Timer T0, Multi-Input
Wake-Up, Software Trap, MICROWIRE/PLUS and External
Input.
All interrupts force a branch to location 00FF Hex in program
memory. The VIS instruction may be used to vector to the
appropriate service routine from location 00FF Hex.
(Continued)
FIGURE 20. Multi-Input Wake-Up Logic
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CWKEN and LWKEN are read/write registers that are
cleared at reset, so no Wake-Up events or interrupts are
enabled following reset. CWKEDG and LWKEDG are also
cleared at reset.
The Software trap has the highest priority while the default
VIS has the lowest priority.
Each of the 13 maskable inputs has a fixed arbitration rank-
ing and vector.
Figure 21 shows the Interrupt block diagram.
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