mb91101 Fujitsu Microelectronics, Inc., mb91101 Datasheet - Page 21

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mb91101

Manufacturer Part Number
mb91101
Description
32-bit Risc Microcontroller Cmos
Manufacturer
Fujitsu Microelectronics, Inc.
Datasheet

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• Condition code register (CCR)
• System condition code register (SCR)
• Interrupt level mask register (ILM)
S-flag: Specifies a stack pointer used as R15.
I-flag: Controls user interrupt request enable/disable.
N-flag: Indicates sign bit when division result is assumed to be in the 2’s complement format.
Z-flag: Indicates whether or not the result of division was “0”.
V-flag: Assumes the operand used in calculation in the 2’s complement format and indicates whether or not
C-flag: Indicates if a carry or borrow from the MSB has occurred.
T-flag: Specifies whether or not to enable step trace trap.
ILM4 to ILM0: Register for holding interrupt level mask value. The value held by this register is used as a
overflow has occurred.
ILM4
0
0
1
level mask. When an interrupt request issued to the CPU is higher than the level held by ILM,
the interrupt request is accepted.
ILM3
0
1
1
ILM2
0
0
1
:
:
:
:
ILM1
0
0
1
ILM0
0
0
1
MB91101/MB91101A
Interrupt level
15
31
0
:
:
:
:
High-low
High
Low
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