m37753ffchp Mitsumi Electronics, Corp., m37753ffchp Datasheet - Page 31

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m37753ffchp

Manufacturer Part Number
m37753ffchp
Description
Single Chip 16 Bit Cmos Microcomputer Flash Memory Version
Manufacturer
Mitsumi Electronics, Corp.
Datasheet

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Flash memory mode 3 (CPU reprogramming
mode)
The M37753FFCFP and the M37753FFCHP have the CPU repro-
gramming mode where a built-in flash memory is handled by the cen-
tral processing unit (CPU). 112 Kbytes (addresses 001000
00EFFF
flash memory shown in Figure 1 can be reprogrammed (erase and
program). Remaining 8 Kbytes of the flash memory (addresses
00F000
(It is possible to reprogram this remaining 8 Kbytes in the parallel I/O
mode and the serial I/O mode). This area of 8 Kbytes can be used as
an area where the control program of CPU reprogramming mode is
stored.
In CPU reprogramming mode, the flash memory is handled by writ-
ing and reading to/from the flash memory control register (see Fig-
ure 21) and the flash command register (see Figure 22).
The CNV
gramming mode. It is necessary to apply the power-supply voltage of
V
Functional outline (Parallel input/output
mode)
Figure 21 shows the flash memory control register bit configuration.
Fig. 21 Flash memory control register bit configuration
PP
H from the external to this pin.
16
16
SS
to 010FFF
and addresses 011000
pin is used as the V
Notes 1: Bit 0 can be reprogrammed only when 0 V is applied to the CNV
7
16
6
0
2: When bit 0 is “1,” the processor mode does not change even if V
) cannot be reprogrammed, but can be read.
5
4
0
3
PP
16
power supply pin in CPU repro-
2
to 01EFFF
1
0
16
) of the 120-Kbyte
SHINGLE-CHIP 16-BIT CMOS MICROCOMPUTER FLASH MEMORY VERSION
Flash memory control regsiter
CPU reprogramming mode select bit (Notes 1, 2)
Auto erase/Erase/Program busy flag
CPU reprogramming mode monitor flag
Fix this bit to “0.”
Erase/Program area select bits
Fix this bit to “0.”
0 : CPU reprogramming mdoe is invalid. (Normal operation mode)
1 : When applying 0 V or V
0 : Auto erase, erase, and program are completed or not have been executed.
1 : Auto erase/erase/program is being executed.
0 : CPU reprogramming mode is invalid.
1 : CPU reprogramming mode is valid.
0
1 0 : Addresses 001000
1 1 : Addresses 011000
invalid. When applying V
: Addresses 001000
and addresses 011000
16
to
Figure 22 shows the flash command register bit configuration.
Bit 0 of the flash memory control register is the CPU reprogramming
mode select bit. When this bit is set to “1” and V
CNVss/V
the CPU reprogramming mode is realized or not is judged by reading
the CPU reprogramming mode monitor flag (bit 3 of the flash
memory control register).
Bit 1 is a busy flag which becomes “1" during auto erase, erase, and
program execution.
Whether these operations have been completed or not is judged by
checking this flag after each command of auto erase, erase, and the
program is executed.
Bits 4, 5 of the flash memory control register are the erase/program
area select bits. These bits specify an area where auto erase, erase,
and program is operated. When the auto erase and the erase com-
mands are executed after an area is specified by these bits, only the
specified area is erased. Only for the specified area, programming is
enabled; for the other areas, programming is disabled.
Figure 23 shows the processor mode register 0 bit configuration in
the CPU reprogramming mode. Set bit 1 to “0” (single-chip or
memory expansion mode) in the CPU reprogramming mode. Set bit
2 (internal memory access bus cycle select bit) to “0.”
Be sure to set data length select flag m to “1" (8-bit length) before-
hand because writing and reading of data are operated in unit of
byte.
16
16
16
PP
to 00EFFF
to 00EFFF
to 01EFFF
PP
PP
SS
16
L to CNV
H to CNV
H is applied to the CNVSS/V
Address
67
/V
to 01EFFF
PP
16
PP
pin.
pin, the CPU reprogramming mode is selected. Whether
16
16
SS
16
SS
(total 56 Kbytes)
/V
(total 56 Kbytes)
16
/V
PP
PP
(total 112 Kbytes)
pin, CPU reprogramming mode is
pin, CPU reprogramming mode is valid.
MITSUBISHI MICROCOMPUTERS
PP
pin.
M37753FFCHP
M37753FFCFP
PP
H is applied to the
31

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