pa7540 ETC-unknow, pa7540 Datasheet
pa7540
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pa7540 Summary of contents
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... High-Speed Commercial and Industrial Versions - As fast as 10ns/15ns (tpdi/tpdx), 71.4MHz (f - Industrial grade available for 4.5 to 5.5V V -40 to +85 °C temperatures General Description The PA7540 is a member of the Programmable Electrically Erasable Logic (PEEL™) Array family based on ICT’s CMOS EEPROM technology. designers from the limitations of ordinary PLDs by providing the architectural flexibility and speed needed for today’ ...
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... PLA (programmable AND, programmable OR). The logic array implements all logic functions and provides interconnection and control of the cells. In the PA7540 PEEL™ Array, 42 inputs are available into the array from the I/O cells and input/global- clock pins. ...
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Sum Sum-A Sum-B = Preset Sum-B Sum-C = Reset, Clock, Sum-C Sum-D = Clock, Output Enable after clocked Best for ...
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... LCC register-type, used to save product terms for loadable counters and state machines (see Figure 10). The PA7540 provides two global cells that divides the LCC and IOCs into two groups, A and B. Half of the LCCs and IOCs use global cell A, half use global cell B ...
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... PEEL™ Array. The code can be read back even after the security bit has been set. The signature word can be used to identify the pattern programmed in the device or to record the design revision. Figure 11 - WinPLACE Architectural Editor for PA7540 programming feature, Figure 12 - WinPLACE LCC and IOC screen 5 ...
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Table 1. Absolute Maximum Ratings Symbol Parameter V Supply Voltage Voltage Applied to Any Pin Output Current O T Storage Temperature ST T Lead Temperature LT Table 2. Operating Ranges Symbol Parameter V ...
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Table 4. A.C Electrical Characteristics Combinatorial Symbol Propagation delay Internal (t t PDI Propagation delay External (t t PDX Input or I/O pin to array input t IA Array input to LCC t AL LCC input to LCC output t ...
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Table 5. A.C. Electrical Characteristics Sequential Symbol Internal set-up to system clock t SCI ( Input (EXT.) set-up to system clock, - LCC (t t SCX System-clock to Array Int. - LCC/IOC/INC t ...
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Figure 15. Sequential Timing – Waveforms and Block Diagram Notes 1. Minimum DC input is -0.5V, however inputs may under-shoot to -2.0V for periods less than 20ns. 2.Test points for Clock and ...
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... Table 6. Ordering Information Part Number PA7540P-15 PA7540J-15 PA7540JN-15 PA7540S-15 PA7540PI-15 PA7540JI-15 PA7540JNI-15 PA7540SI-15 Figure 16. Part Number P ackag 300m il DIP J = Plastic (J) Leaded Chip Carrier (PLCC PLCC Alternate Pin Out S = SOIC 300 m il Gullwing Anachip USA, Inc. 780 Montague Expressway, #201 San Jose, CA 95131 ...