km416s4030b Samsung Semiconductor, Inc., km416s4030b Datasheet

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km416s4030b

Manufacturer Part Number
km416s4030b
Description
Cmos Sdram
Manufacturer
Samsung Semiconductor, Inc.
Datasheet

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KM416S4030B
Revision History
Revision .1(November 1997)
Revision .2 (February 1998)
Revision .3 (March 1998)
Revision .4 (June 1998)
- t
SH
- t
- Binning -10 does not meet PC100 characteristics .
- The measuring condition of t
- Cin to be measured at V
- AC Operating Condition is changed as defined :
- I
- I
- I
- Input leakage Currents (Inputs / DQ) are changed.
- I
I
So AC parameter/Characteristics have changed to 64M 2nd values.
0pF +50 to V
IL
V
V
RDL
CC3
CC6
CC4
CC2
(-10 binning) is revised.
IH
IL
(Inputs) :
(min) = -2.0V AC. The undershoot voltage duration is
(max) = 5.6V AC. The overshoot voltage duration is
PS is changed 1mA to 2mA.
N, I
has changed 10ns to 12ns.
for Low power is changed 400uA to 450uA.
value is changed.
CC2
NS, I
5uA to
SS
CC3
/V
DD
N & I
, 50pF +50 to V
1uA, I
DD
CC3
= 3.3V, T
R
NS values are changed.
/t
IL
F
(DQ) :
is clearly defined each as
A
= 23 C, f = 1MHz, V
SS
5uA to
/V
DD
1.5uA.
3ns.
REF
3ns.
=1.4V 200 mV.
CMOS SDRAM
REV. 4 June '98

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km416s4030b Summary of contents

Page 1

... KM416S4030B Revision History Revision .1(November 1997 has changed 10ns to 12ns. RDL - Binning -10 does not meet PC100 characteristics . So AC parameter/Characteristics have changed to 64M 2nd values. Revision .2 (February 1998) - Input leakage Currents (Inputs / DQ) are changed. I (Inputs) : 5uA to 1uA The measuring condition of t 0pF + ...

Page 2

... LCBR CLK CKE GENERAL DESCRIPTION The KM416S4030B is 67,108,864 bits synchronous high data rate Dynamic RAM organized 1,048,576 words by 16 bits, fabricated with SAMSUNG s high performance CMOS technology. Synchronous design allows precise cycle control with the use of system clock I/O transactions are possible on every clock cycle ...

Page 3

... KM416S4030B PIN CONFIGURATION (Top view) PIN FUNCTION DESCRIPTION Pin Name CLK System clock CS Chip select CKE Clock enable Address Bank select address 0 1 RAS Row address strobe CAS Column address strobe WE Write enable L(U)DQM Data input/output mask DQ ~ Data input/output ...

Page 4

... KM416S4030B ABSOLUTE MAXIMUM RATINGS Parameter Voltage on any pin relative to Vss Voltage on V supply relative to Vss DD Storage temperature Power dissipation Short circuit current Note : Permanent device damage may occur if "ABSOLUTE MAXIMUM RATINGS" are exceeded. Functional operation should be restricted to recommended operating condition. Exposure to higher than recommended voltage for extended periods of time could affect device reliability. ...

Page 5

... I CC3 Operating current I CC4 (Burst mode) Refresh current I CC5 Self refresh current I CC6 Notes : 1. Measured with outputs open. 2. Refresh period is 64ms. 3. KM416S4030BT-G** 4. KM416S4030BT-F Test Condition Burst length = (min CKE V (max 15ns ...

Page 6

... KM416S4030B AC OPERATING TEST CONDITIONS Parameter AC input levels (Vih/Vil) Input timing measurement reference level Input rise and fall time Output timing measurement reference level Output load condition 3.3V Output 870 (Fig output load circuit OPERATING AC PARAMETER (Ac operating conditions unless otherwise noted) Parameter ...

Page 7

... KM416S4030B AC CHARACTERISTICS (AC operating conditions unless otherwise noted) Parameter CAS latency=3 CLK cycle time CAS latency=2 CAS latency=3 CLK to valid output delay CAS latency=2 CAS latency=3 Output data hold time CAS latency=2 CLK high pulse width CLK low pulse width Input setup time ...

Page 8

... KM416S4030B IBIS SPECIFICATION I Characteristics (Pull-up) OH 100MHz 100MHz Voltage Min Max (V) I (mA) I (mA) 3.45 -2.4 3.3 -27.3 3.0 0.0 -74.1 2.6 -21.1 -129.2 2.4 -34.1 -153.3 2.0 -58.7 -197.0 1.8 -67.3 -226.2 1.65 -73.0 -248.0 1.5 -77.9 -269.7 1.4 -80.8 -284.3 1.0 -88.6 -344.5 0.0 -93.0 -502.4 I Characteristics (Pull-down) OL 100MHz 100MHz Voltage Min Max (V) I (mA) I (mA) 0.0 0.0 0.0 0.4 27.5 70.2 0.65 41.8 107.5 0.85 51.6 133.8 1.0 58.0 151.2 1.4 70.7 187.7 1.5 72.9 194.4 1.65 75.4 202.5 1.8 77.0 208.6 1.95 77.6 212.0 3.0 80.3 219.6 3.45 81.4 222.6 0 0.5 0 66MHz ...

Page 9

... KM416S4030B V Clamp @ CLK, CKE, CS, DQM & (V) I (mA) DD 0.0 0.0 0.2 0.0 0.4 0.0 0.6 0.0 0.7 0.0 0.8 0.0 0.9 0.0 1.0 0.23 1.2 1.34 1.4 3.02 1.6 5.06 1.8 7.35 2.0 9.83 2.2 12.48 2.4 15.30 2.6 18.31 V Clamp @ CLK, CKE, CS, DQM & (V) I (mA) SS -2.6 -57.23 -2.4 -45.77 -2.2 -38.26 -2.0 -31.22 -1.8 -24.58 -1.6 -18.37 -1.4 -12.56 -1.2 -7.57 -1.0 -3.37 -0.9 -1.75 -0.8 -0.58 -0.7 -0.05 -0.6 0.0 -0.4 0.0 -0.2 0.0 0.0 0.0 Minimum V clamp current DD (Referenced Voltage I (mA) Minimum V clamp current -10 -20 -30 -40 -50 -60 Voltage I (mA) CMOS SDRAM ...

Page 10

... KM416S4030BT-L CAS Frequency Latency 100MHz (10.0ns) 3 83MHz (12.0ns) 2 75MHz (13.0ns) 2 66MHz (15.0ns) 2 60MHz (16.7ns) 2 KM416S4030BT-10 CAS Frequency Latency 100MHz (10.0ns) 3 83MHz (12.0ns) 3 75MHz (13.0ns) 2 66MHz (15.0ns) 2 60MHz (16.7ns RAS RP 68ns 48ns ...

Page 11

... KM416S4030B SIMPLIFIED TRUTH TABLE Command Register Mode register set Auto refresh Entry Refresh Self refresh Bank active & row addr. Read & Auto precharge disable column address Auto precharge enable Write & Auto precharge disable column address Auto precharge enable Burst stop ...

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