km416v4004b Samsung Semiconductor, Inc., km416v4004b Datasheet
km416v4004b
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km416v4004b Summary of contents
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... Furthermore, Self-refresh operation is available in L-version. This 4Mx16 EDO Mode DRAM family is fabricated using Sam- sung s advanced CMOS process to realize high band-width, low power consumption and high reliability. FEATURES • Part Identification - KM416V4004B/B-L(3.3V, 8K Ref.) - KM416V4104B/B-L(3.3V, 4K Ref.) • Active Power Dissipation Speed ...
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... KM416V4004B, KM416V4104B PIN CONFIGURATION (Top Views) • KM416V40(1)04BS ¡Û DQ0 DQ15 3 48 DQ1 DQ14 4 47 DQ2 DQ13 5 46 DQ3 DQ12 DQ4 DQ11 8 43 DQ5 DQ10 9 42 DQ6 DQ9 10 41 DQ7 DQ8 11 40 N.C N ...
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... KM416V4004B, KM416V4104B ABSOLUTE MAXIMUM RATINGS Parameter Voltage on any pin relative Voltage on V supply relative Storage Temperature Power Dissipation Short Circuit Output Current * Permanent device damage may occur if "ABSOLUTE MAXIMUM RATINGS" are exceeded. Functional operation should be restricted to the conditions as detailed in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for extended periods may affect device reliability ...
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... KM416V4004B, KM416V4104B DC AND OPERATING CHARACTERISTICS Symbol Power Speed I Don t care CC1 Normal I Don t care CC2 L I Don t care CC3 I Don t care CC4 Normal I Don t care CC5 L I Don t care CC6 I L Don t care CC7 I L Don t care CCS Operating Current (RAS and UCAS, LCAS, Address cycling @ ...
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... KM416V4004B, KM416V4104B CAPACITANCE (T = Parameter Input capacitance [A0 ~ A12] Input capacitance [RAS, UCAS, LCAS, W, OE] Output capacitance [DQ0 - DQ15] AC CHARACTERISTICS ( Test condition : V =3.3V 0.3V, Vih/Vil=2.2/0.7V, Voh/Vol=2.0/0.8V CC Parameter Random read or write cycle time Read-modify-write cycle time Access time from RAS Access time from CAS ...
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... KM416V4004B, KM416V4104B AC CHARACTERISTICS (Continued) Parameter Data hold time Refresh period (Normal) Refresh period (L-ver) Write command set-up time CAS to W delay time RAS to W delay time Column address to W delay time CAS set-up time (CAS -before-RAS refresh) CAS hold time (CAS -before-RAS refresh) ...
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... KM416V4004B, KM416V4104B TEST MODE CYCLE Parameter Random read or write cycle time Read-modify-write cycle time Access time from RAS Access time from CAS Access time from column address RAS pulse width CAS pulse width RAS hold time CAS hold time Column Address to RAS lead time ...
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... KM416V4004B, KM416V4104B NOTES An initial pause of 200us is required after power-up followed by any 8 RAS-only refresh or CAS-before-RAS refresh cycles 1. before proper device operation is achieved. V (min) and V (max) are reference levels for measuring timing of input signals. Transition times are measured between (min) and V (max) and are assumed to be 2ns for all inputs ...
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... KM416V4004B, KM416V4104B t is specified from W falling edge to the earlier CAS rising edge. 16. CWL t 17. is referenced to the earlier CAS falling edge before RAS transition low. CSR 18 referenced to the later CAS rising edge after RAS transition low. CHR RAS LCAS UCAS t 19. ...
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... KM416V4004B, KM416V4104B WORD READ CYCLE RAS CRP UCAS CRP LCAS ASR ADDRESS DQ0 ~ DQ7 DQ8 ~ DQ15 RAS t CSH t RCD t CAS t CSH t t RCD RSH ...
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... KM416V4004B, KM416V4104B LOWER BYTE READ CYCLE NOTE : D = OPEN RAS CRP UCAS CRP LCAS ASR ADDRESS DQ0 ~ DQ7 DQ8 ~ DQ15 RAS t CSH t t RCD RSH ...
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... KM416V4004B, KM416V4104B UPPER BYTE READ CYCLE NOTE : D = OPEN RAS CRP UCAS CRP LCAS ASR ADDRESS DQ0 ~ DQ7 DQ8 ~ DQ15 RAS t CSH t RCD t CAS t RAD ...
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... KM416V4004B, KM416V4104B WORD WRITE CYCLE ( EARLY WRITE ) NOTE : D = OPEN OUT RAS CRP UCAS CRP LCAS ASR ADDRESS DQ0 ~ DQ7 DQ8 ~ DQ15 RAS t CSH t RCD ...
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... KM416V4004B, KM416V4104B LOWER BYTE WRITE CYCLE ( EARLY WRITE ) NOTE : D = OPEN OUT RAS CRP UCAS CRP LCAS ASR ADDRESS DQ0 ~ DQ7 DQ8 ~ DQ15 RAS t CSH ...
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... KM416V4004B, KM416V4104B UPPER BYTE WRITE CYCLE ( EARLY WRITE ) NOTE : D = OPEN OUT RAS CRP UCAS CRP LCAS ASR ADDRESS DQ0 ~ DQ7 DQ8 ~ DQ15 RAS t CSH ...
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... KM416V4004B, KM416V4104B WORD WRITE CYCLE ( OE CONTROLLED WRITE ) NOTE : D = OPEN OUT RAS CRP UCAS CRP LCAS ASR ADDRESS DQ0 ~ DQ7 DQ8 ~ DQ15 RAS t CSH t RCD ...
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... KM416V4004B, KM416V4104B LOWER BYTE WRITE CYCLE ( OE CONTROLLED WRITE ) NOTE : D = OPEN OUT RAS CRP UCAS CRP LCAS ASR ADDRESS DQ0 ~ DQ7 DQ8 ~ DQ15 RAS t CSH ...
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... KM416V4004B, KM416V4104B UPPER BYTE WRITE CYCLE ( OE CONTROLLED WRITE ) NOTE : D = OPEN OUT RAS CRP UCAS CRP LCAS ASR ADDRESS DQ0 ~ DQ7 DQ8 ~ DQ15 RAS t CSH ...
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... KM416V4004B, KM416V4104B WORD READ - MODIFY - WRITE CYCLE RAS CRP UCAS CRP LCAS ASR ROW A ADDR DQ0 ~ DQ7 I/OL DQ8 ~ DQ15 I/OL t RWC t RAS t t RCD RSH RCD ...
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... KM416V4004B, KM416V4104B LOWER-BYTE READ - MODIFY - WRITE CYCLE RAS CRP UCAS CRP LCAS ASR ROW A ADDR DQ0 ~ DQ7 I/OL DQ8 ~ DQ15 RWC t RAS t t RCD RSH t RAD ...
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... KM416V4004B, KM416V4104B UPPER-BYTE READ - MODIFY - WRITE CYCLE RAS CRP UCAS CRP LCAS ASR ROW A ADDR DQ0 ~ DQ7 DQ8 ~ DQ15 I/OL t RWC t RAS t t RCD RSH t RAD ...
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... KM416V4004B, KM416V4104B HYPER PAGE MODE WORD READ CYCLE RAS CRP UCAS CRP LCAS RAD t t ASR RAH ROW A ADDR DQ0 ~ DQ7 DQ8 ~ DQ15 RASP ...
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... KM416V4004B, KM416V4104B HYPER PAGE MODE LOWER BYTE READ CYCLE RAS CRP UCAS LCAS RAD t t ASR RAH ROW ADDR DQ0 ~ DQ7 DQ8 ~ DQ15 RASP ¡ ...
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... KM416V4004B, KM416V4104B HYPER PAGE MODE UPPER BYTE READ CYCLE RAS CRP UCAS CRP LCAS RAD t t ASR RAH ROW A ADDR DQ0 ~ DQ7 DQ8 ~ DQ15 ...
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... KM416V4004B, KM416V4104B HYPER PAGE MODE WORD WRITE CYCLE ( EARLY WRITE ) NOTE : D = OPEN OUT RAS CRP UCAS CRP LCAS ASR RAH ROW A ADDR DQ0 ~ DQ7 DQ8 ~ DQ15 ...
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... KM416V4004B, KM416V4104B HYPER PAGE MODE LOWER BYTE WRITE CYCLE ( EARLY WRITE ) NOTE : D = OPEN OUT RAS CRP UCAS CRP LCAS ASR t RAH ROW A ADDR DQ0 ~ DQ7 DQ8 ~ DQ15 ...
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... KM416V4004B, KM416V4104B HYPER PAGE MODE UPPER BYTE WRITE CYCLE ( EARLY WRITE ) NOTE : D = OPEN OUT RAS CRP UCAS CRP LCAS ASR RAH ROW A ADDR DQ0 ~ DQ7 ...
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... KM416V4004B, KM416V4104B HYPER PAGE MODE WORD READ - MODIFY - WRITE CYCLE RAS CRP t RCD UCAS CRP t RCD LCAS RAD ASR ASC ROW A ADDR RCS DQ0 ~ DQ7 I/OL DQ8 ~ DQ15 ...
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... KM416V4004B, KM416V4104B HYPER PAGE MODE LOWER BYTE READ - MODIFY - WRITE CYCLE RAS CRP UCAS CRP t RCD LCAS RAD ASR ASC ROW A ADDR DQ0 ~ DQ7 I/OL DQ8 ~ DQ15 ...
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... KM416V4004B, KM416V4104B HYPER PAGE MODE UPPER BYTE READ - MODIFY - WRITE CYCLE RAS CRP t RCD UCAS CRP LCAS RAD ASR ASC ROW A ADDR DQ0 ~ DQ7 I/OL DQ8 ~ DQ15 ...
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... KM416V4004B, KM416V4104B HYPER PAGE READ AND WRITE MIXED CYCLE RAS UCAS t RCD LCAS t RAD RAH t t ASR ROW A ADDR DQ0 ~ DQ7 I/OL DQ8 ~ DQ15 I/OL t RASP t t READ( ...
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... KM416V4004B, KM416V4104B RAS - ONLY REFRESH CYCLE NOTE : Don t care OPEN OUT RAS CRP UCAS CRP LCAS ASR RAH ROW A ADDR CAS - BEFORE - RAS REFRESH CYCLE NOTE : OE Don t care ...
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... KM416V4004B, KM416V4104B HIDDEN REFRESH CYCLE ( READ ) RAS CRP UCAS CRP LCAS ASR ADDRESS DQ0 ~ DQ7 DQ8 ~ DQ15 Hidden refresh cycle of 64Mb A-die & B-die, when CAS signal transits from Low to High, the valid data may be cut off. ...
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... KM416V4004B, KM416V4104B HIDDEN REFRESH CYCLE ( WRITE ) NOTE : D = OPEN OUT RAS CRP UCAS CRP LCAS ASR ADDRESS DQ0 ~ DQ7 DQ8 ~ DQ15 RAS t t RCD ...
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... KM416V4004B, KM416V4104B CAS - BEFORE - RAS SELF REFRESH CYCLE NOTE : Don t care RAS RPC UCAS LCAS DQ0 ~ DQ7 CEZ DQ8 ~ DQ15 TEST MODE IN CYCLE NOTE : Don t care ...
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... KM416V4004B, KM416V4104B PACKAGE DIMENSION 50 TSOP(II) 400mil 0.034 (0.875) 0.841 (21.35) MAX 0.821 (20.85) 0.047 (1.20) 0.829 (21.05) 0.0315 (0.80) 0.002 (0.05) MIN 0.010 (0.25) 0.018 (0.45) CMOS DRAM Units : Inches (millimeters) 0.004 (0.10) 0.010 (0.25) 0.010 (0.25) MAX TYP 0.018 (0.45) 0.030 (0.75) O 0~8 ...