ata5773 ATMEL Corporation, ata5773 Datasheet - Page 72
ata5773
Manufacturer Part Number
ata5773
Description
Microcontroller With Uhf Ask/fsk Transmitter
Manufacturer
ATMEL Corporation
Datasheet
1.ATA5773.pdf
(284 pages)
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5.4
5.4.1
5.5
5.5.1
5.5.2
20
I/O Memory
Register Description
ATtiny24/44/84
General Purpose I/O Registers
EEARH – EEPROM Address Register
EEARL – EEPROM Address Register
The I/O space definition of the ATtiny24/44/84 is shown in
All ATtiny24/44/84 I/Os and peripherals are placed in the I/O space. All I/O locations may be
accessed by the LD/LDS/LDD and ST/STS/STD instructions, transferring data between the 32
general purpose working registers and the I/O space. I/O Registers within the address range
0x00 - 0x1F are directly bit-accessible using the SBI and CBI instructions. In these registers, the
value of single bits can be checked by using the SBIS and SBIC instructions. See the instruction
set section for more details. When using the I/O specific commands IN and OUT, the I/O
addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data space using LD
and ST instructions, 0x20 must be added to these addresses.
For compatibility with future devices, reserved bits should be written to zero if accessed.
Reserved I/O memory addresses should never be written.
Some of the Status Flags are cleared by writing a logical one to them. Note that CBI and SBI
instructions will only operate on the specified bit, and can therefore be used on registers contain-
ing such Status Flags. The CBI and SBI instructions work with registers 0x00 to 0x1F only.
The I/O and Peripherals Control Registers are explained in later sections.
The ATtiny24/44/84 contains three General Purpose I/O Registers. These registers can be used
for storing any information, and they are particularly useful for storing global variables and status
flags. General Purpose I/O Registers within the address range 0x00 - 0x1F are directly bit-
accessible using the SBI, CBI, SBIS, and SBIC instructions.
• Bits 7..1 – Res: Reserved Bits
These bits are reserved bits in ATtiny24/44/84 and will always read as zero.
• Bit 0 – EEAR8: EEPROM Address
The EEPROM Address Register – EEARH – specifies the most significant bit for EEPROM
address in the 512 bytes EEPROM space for Tiny84. This bit is reserved bit in the ATtiny24/44
and will always read as zero. The initial value of EEAR is undefined. A proper value must be
written before the EEPROM may be accessed.
Bit
0x1F (0x3F)
Read/Write
Initial Value
Bit
0x1E (0x3E)
Read/Write
Initial Value
EEAR7
R/W
R
7
–
0
7
X
EEAR6
R/W
R
X
6
–
0
6
EEAR5
R/W
5
–
R
0
5
X
EEAR4
R/W
R
X
4
–
0
4
EEAR3
R/W
R
X
3
–
0
3
“Register Summary” on page
EEAR2
R/W
R
2
–
0
2
X
EEAR1
R/W
R
X
1
–
0
1
EEAR8
EEAR0
R/W
R/W
X
X
0
0
8006G–AVR–01/08
EEARH
EEARL
214.
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