xr16m581il32 Exar Corporation, xr16m581il32 Datasheet - Page 27

• Manufacturer Part Number: xr16m581il32
• Description: 1.62v To 3.63v Uart With 16-byte Fifo And Vlio Interface
• Manufacturer: Exar Corporation

REV. 1.0.0
IER[3]: Modem Status Interrupt Enable
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IER[4]: Sleep Mode Enable (requires EFR[4] = 1)
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IER[5]: Xoff Interrupt Enable (requires EFR[4]=1)
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IER[6]: RTS# Output Interrupt Enable (requires EFR[4]=1)
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IER[7]: CTS# Input Interrupt Enable (requires EFR[4]=1)
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The UART provides multiple levels of prioritized interrupts to minimize external software interaction. The
Interrupt Status Register (ISR) provides the user with six interrupt status bits. Performing a read cycle on the
ISR will give the user the current highest pending interrupt level to be serviced, others are queued up to be
serviced next. No other interrupts are acknowledged until the pending interrupt is serviced. The Interrupt
Source Table,
associated with each of these interrupt levels.
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4.4
4.4.1
Logic 0 = Disable the modem status register interrupt (default).
Logic 1 = Enable the modem status register interrupt.
Logic 0 = Disable Sleep Mode (default).
Logic 1 = Enable Sleep Mode. See Sleep Mode section for further details.
Logic 0 = Disable the software flow control, receive Xoff interrupt. (default)
Logic 1 = Enable the software flow control, receive Xoff interrupt. See Software Flow Control section for
details.
Logic 0 = Disable the RTS# interrupt (default).
Logic 1 = Enable the RTS# interrupt. The UART issues an interrupt when the RTS# pin makes a transition
from LOW to HIGH (if enabled by EFR bit-6).
Logic 0 = Disable the CTS# interrupt (default).
Logic 1 = Enable the CTS# interrupt. The UART issues an interrupt when CTS# pin makes a transition from
LOW to HIGH (if enabled by EFR bit-7).
LSR is by any of the LSR bits 1, 2, 3 and 4.
RXRDY is by RX trigger level.
RXRDY Time-out is by a 4-char plus 12 bits delay timer.
TXRDY is by TX trigger level or TX FIFO empty.
MSR is by any of the MSR bits 0, 1, 2 and 3.
Receive Xon/Xoff/Special character is by detection of a Xon, Xoff or Special character.
CTS# is when the remote transmitter toggles the input pin (from LOW to HIGH) during auto CTS flow control.
RTS# is when its receiver toggles the output pin (from LOW to HIGH) during auto RTS flow control.
Wakeup interrupt is generated when the M581 wakes up from the sleep mode.
Interrupt Status Register (ISR) - Read-Only
Interrupt Generation:
Table
8, shows the data values (bit 0-5) for the interrupt priority levels and the interrupt sources
1.62V TO 3.63V UART WITH 16-BYTE FIFO AND VLIO INTERFACE
27
XR16M581