xr16m598 Exar Corporation, xr16m598 Datasheet - Page 17

• Manufacturer Part Number: xr16m598
• Description: 1.62v To 3.63v High Performance Octal Uart With 16-byte Fifo
• Manufacturer: Exar Corporation

REV. 1.0.0
When software flow control is enabled (
characters with the programmed Xon-1,2 or Xoff-1,2 character value(s). If receive character(s) (RX) match the
programmed Xoff-1,2 value(s), the 598 will halt transmission (TX) as soon as the current character has
completed transmission. When a match occurs, the Xoff (if enabled via IER bit-5) flag will be set and the
interrupt output pin will be activated. Following a suspension due to a match of the Xoff character(s), the 598
will monitor the receive data stream for a match to the Xon-1,2 character(s). If a match is found, the 598 will
resume operation and clear the flags (ISR bit-4).
Reset initially sets the contents of the Xon1, Xon2, Xoff1 and Xoff2 flow control registers to ’0’. Following reset,
any desired Xon/Xoff value can be used for software flow control. Different conditions can be set to detect Xon/
Xoff characters (
are selected, the 598 compares two consecutive receive characters with two software flow control 8-bit values
F
2.11
IGURE
The local UART (UARTA) starts data transfer by asserting RTSA# (1). RTSA# is normally connected to CTSB# (2) of
remote UART (UARTB). CTSB# allows its transmitter to send data (3). TXB data arrives and fills UARTA receive FIFO
(4). When RXA data fills up to its receive FIFO trigger level, UARTA activates its RXA data ready interrupt (5) and con-
tinues to receive and put data into its FIFO. If interrupt service latency is long and data is not being unloaded, UARTA
monitors its receive data fill level to match the upper threshold of RTS delay and de-assert RTSA# (6). CTSB# follows
(7) and request UARTB transmitter to suspend data transfer. UARTB stops or finishes sending the data bits in its trans-
mit shift register (8). When receive FIFO data in UARTA is unloaded to match the lower threshold of RTS delay (9),
UARTA re-asserts RTSA# (10), CTSB# recognizes the change (11) and restarts its transmitter and data flow again until
next receive FIFO trigger (12). This same event applies to the reverse direction when UARTA sends data to UARTB
with RTSB# and CTSA# controlling the data flow.
9. A
Auto Xon/Xoff (Software) Flow Control
(RXA FIFO
CTSB#
RXA FIFO
Interrupt)
RTSA#
TXB
INTA
UTO
Trigger Reached
Receiver FIFO
Trigger Level
Local UART
Transmitter
Auto CTS
Auto RTS
RTS/DTR
See Table 18
UARTA
Monitor
Data Starts
Receive
Data
Assert RTS# to Begin
AND
1
2
Transmission
Trigger Level
1.62V TO 3.63V HIGH PERFORMANCE OCTAL UART WITH 16-BYTE FIFO
) and suspend/resume transmissions. When double 8-bit Xon/Xoff characters
3
4
CTS/DSR F
RX FIFO
RTSA#
TXA
CTSA#
RXA
ON
ON
See Table 18
LOW
5
C
7
Threshold
RTS High
ONTROL
), the 598 compares one or two sequential receive data
17
6
8
O
OFF
Suspend
PERATION
OFF
RTSB#
CTSB#
RTS Low
Threshold
RXB
TXB
Restart
9
10
11
Trigger Reached
Remote UART
ON
Trigger Level
Receiver FIFO
12
Auto CTS
Auto RTS
Transmitter
UARTB
Monitor
ON
Trigger Level
RX FIFO
XR16M598
RTSCTS1