xr16v2750 Exar Corporation, xr16v2750 Datasheet - Page 21

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xr16v2750

Manufacturer Part Number
xr16v2750
Description
High Performance Duart With 64-byte Fifo
Manufacturer
Exar Corporation
Datasheet

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REV. 1.0.3
The V2750 UART provides an internal loopback capability for system diagnostic purposes. The internal
loopback mode is enabled by setting MCR register bit-4 to logic 1. All regular UART functions operate normally.
Figure 12
output is internally routed to the receive shift register input allowing the system to receive the same data that it
was sending. The TX, RTS# and DTR# pins are held while the CTS#, DSR# CD# and RI# inputs are ignored.
Caution: the RX input pin must be held HIGH during loopback test else upon exiting the loopback test the
UART may detect and report a false “break” signal. Also, Auto RTS/CTS flow control is not supported during
internal loopback.
2.21
Internal Loopback
shows how the modem port signals are re-configured. Transmit data from the transmit shift register
F
IGURE
12. I
NTERNAL
Transmit Shift Register
Receive Shift Register
L
OOPBACK IN
(RHR/FIFO)
(THR/FIFO)
C
RTS#
CTS#
DTR#
DSR#
OP2#
CD#
RI#
HANNEL
MCR bit-4=1
21
HIGH PERFORMANCE DUART WITH 64-BYTE FIFO
A
VCC
OP1#
VCC
VCC
VCC
AND
B
TXA/TXB
RXA/RXB
RTSA#/RTSB#
CTSA#/CTSB#
DTRA#/DTRB#
DSRA#/DSRB#
RIA#/RIB#
CDA#/CDB#
OP2A#/OP2B#
XR16V2750

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