xr16l2750im Exar Corporation, xr16l2750im Datasheet - Page 47
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xr16l2750im
Manufacturer Part Number
xr16l2750im
Description
High-performance 2.25v - 5.5v Duart
Manufacturer
Exar Corporation
Datasheet
1.XR16L2750IM.pdf
(48 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
xr16l2750im-F
Manufacturer:
Exar Corporation
Quantity:
10 000
Part Number:
xr16l2750im-F
Manufacturer:
EXAR/艾科嘉
Quantity:
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Company:
Part Number:
xr16l2750imTR-F
Manufacturer:
Exar Corporation
Quantity:
10 000
xr
REV. 1.2.1
GENERAL DESCRIPTION................................................................................................. 1
PIN DESCRIPTIONS ......................................................................................................... 3
1.0 PRODUCT DESCRIPTION .................................................................................................................... 6
2.0 FUNCTIONAL DESCRIPTIONS ............................................................................................................ 7
3.0 UART INTERNAL REGISTERS ........................................................................................................... 20
4.0 INTERNAL REGISTER DESCRIPTIONS ............................................................................................ 22
A
F
ORDERING INFORMATION
EATURES
PPLICATIONS
2.1 CPU INTERFACE ............................................................................................................................................. 7
2.2 5-VOLT TOLERANT INPUTS ........................................................................................................................... 7
2.3 DEVICE RESET ................................................................................................................................................ 7
2.4 DEVICE IDENTIFICATION AND REVISION .................................................................................................... 7
2.5 CHANNEL A AND B SELECTION ................................................................................................................... 7
2.6 CHANNEL A AND B INTERNAL REGISTERS ................................................................................................ 8
2.7 DMA MODE ...................................................................................................................................................... 8
2.8 INTA AND INTB OUTPUTS .............................................................................................................................. 9
2.9 CRYSTAL OSCILLATOR OR EXTERNAL CLOCK INPUT ............................................................................. 9
2.10 PROGRAMMABLE BAUD RATE GENERATOR ......................................................................................... 10
2.11 TRANSMITTER ............................................................................................................................................. 11
2.12 RECEIVER .................................................................................................................................................... 12
2.13 AUTO RTS (HARDWARE) FLOW CONTROL ............................................................................................. 14
2.14
2.15
2.16 AUTO XON/XOFF (SOFTWARE) FLOW CONTROL ................................................................................... 16
2.17
2.18
2.19 INFRARED MODE ........................................................................................................................................ 17
2.20
2.21
4.1 RECEIVE HOLDING REGISTER (RHR) - READ- ONLY ............................................................................... 22
4.2 TRANSMIT HOLDING REGISTER (THR) - WRITE-ONLY ............................................................................ 22
4.3 INTERRUPT ENABLE REGISTER (IER) - READ/WRITE ............................................................................. 22
F
F
F
T
T
T
T
F
F
F
T
F
F
F
F
F
T
F
F
T
T
IGURE
IGURE
IGURE
ABLE
ABLE
ABLE
ABLE
IGURE
IGURE
IGURE
ABLE
IGURE
IGURE
IGURE
IGURE
IGURE
ABLE
IGURE
IGURE
ABLE
ABLE
2.11.1 TRANSMIT HOLDING REGISTER (THR) - WRITE ONLY....................................................................................... 11
2.11.2 TRANSMITTER OPERATION IN NON-FIFO MODE ................................................................................................ 11
2.11.3 TRANSMITTER OPERATION IN FIFO MODE ......................................................................................................... 12
2.12.1 RECEIVE HOLDING REGISTER (RHR) - READ-ONLY .......................................................................................... 13
4.3.1 IER VERSUS RECEIVE FIFO INTERRUPT MODE OPERATION ............................................................................. 23
AUTO RTS HYSTERESIS ........................................................................................................................... 14
AUTO CTS FLOW CONTROL ..................................................................................................................... 14
SPECIAL CHARACTER DETECT ............................................................................................................... 16
AUTO RS485 HALF-DUPLEX CONTROL .................................................................................................. 16
SLEEP MODE WITH AUTO WAKE-UP ...................................................................................................... 18
INTERNAL LOOPBACK .............................................................................................................................. 19
1: C
2: TXRDY#
3: INTA
4: INTA
5: T
6: A
7: UART CHANNEL A AND B UART INTERNAL REGISTERS ...................................................................................... 20
8:
1. XR16L2750 B
2. P
3. XR16L2750 D
4. T
5. E
6. B
7. T
8. T
9. R
10. R
11. A
12. I
13. I
..................................................................................................................................................... 1
INTERNAL REGISTERS DESCRIPTION. S
YPICAL DATA RATES WITH A
UTO
HANNEL
IN
YPICAL OSCILLATOR CONNECTIONS
XTERNAL
AUD
RANSMITTER
RANSMITTER
ECEIVER
NFRARED
NTERNAL
............................................................................................................................................... 1
ECEIVER
UTO
O
AND
AND
X
UT
R
ON
RTS
ATE
A
AND
A
INTB P
INTB P
/X
SSIGNMENT
O
C
AND
L
OFF
T
O
G
PERATION IN NON
LOCK
OOP
AND
RANSMIT
RXRDY# O
PERATION IN
ENERATOR AND
O
O
LOCK
ATA
................................................................................................................................ 2
B S
PERATION IN NON
PERATION IN
(S
INS
IN
CTS F
B
C
OFTWARE
B
ACK IN
ELECT
O
ONNECTION FOR
D
US
O
PERATION
IAGRAM
..................................................................................................................................................... 2
D
PERATION FOR
I
ATA
LOW
NTERCONNECTIONS
UTPUTS IN
............................................................................................................................................... 8
C
FIFO
14.7456 MH
) F
HANNEL
E
FIFO
C
-FIFO M
P
NCODING AND
......................................................................................................................................... 1
TABLE OF CONTENTS
LOW
ONTROL
RESCALER
F
AND
OR
-FIFO M
AND
................................................................................................................................. 9
C
FIFO
A
R
E
A
ONTROL
T
XTENDED
ODE
ECEIVER
AND
UTO
RANSMITTER
O
F
Z CRYSTAL OR EXTERNAL CLOCK
LOW
PERATION
..................................................................................................................... 10
ODE
AND
.................................................................................................................... 13
B ................................................................................................................ 19
RTS F
.................................................................................................................... 7
R
............................................................................................................... 16
ECEIVE
HADED BITS ARE ENABLED WHEN
C
.............................................................................................................. 12
DMA M
............................................................................................................... 9
ONTROL
D
ATA
LOW
....................................................................................................... 15
........................................................................................................ 9
I
D
R
ODE
ATA
C
ATE
M
ONTROL
ODE
............................................................................................. 8
D
.......................................................................................... 10
ECODING
..................................................................................... 12
2.25V TO 5.5V DUART WITH 64-BYTE FIFO
M
ODE
.......................................................................... 17
....................................................................... 13
...................................................................... 11
EFR B
IT
-4=1......................................... 21
XR16L2750